Fault Tolerant Circuit Design Using Evolutionary Algorithms

Wu, Huicong

doi:10.4304/jcp.9.1.95-100

Cited by 4 publications

(2 citation statements)

References 12 publications

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“…International Conference on Information Technology and Management Innovation (ICITMI 2015) The genetic algorithm operators are the core part of the algorithm, which often determine the diversity of the population and search direction [6] . It mainly includes the cross operator, mutation operator and selection operator [7,8] . In this paper, mutation operator and selection operator are only used to evolve population.…”

Section: Improved Algorithm Designmentioning

confidence: 99%

An Improved Genetic Algorithm Based On Stages Hybridization For Evolvable Hardware Design

Wu¹,

Wang²

2015

Proceedings of the 4th International Conference on Information Technology and Management Innovation

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Facing the complexity and variability of electronic circuit design, evolvable hardware has gradually become one of the effective methods to design hardware. Algorithm influences the direction and progress of evolution. In order to improve algorithm and solve the current problem that the evolutionary time is long, the convergence speed is slow and the computation is large. This paper proposed an improved stages hybridization genetic algorithm. Using evolvable hardware platform, improved algorithm adopted the stages strategy and simulated the natural population hybridization based on genetic principle. The results show that the improved algorithm has better evolution results than the standard algorithm, whose convergent speed is faster and evolutionary cycle is shorter. Offspring circuits have a higher adaptability. Improved algorithm reduces calculation, and stages parallel strategy shortens time consuming and saves resources. Finally the optimal values of grouping number N and evolutionary generation T are found to improve the algorithm accuracy, which is beneficial to the whole evolution.

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Section: Improved Algorithm Designmentioning

confidence: 99%

An Improved Genetic Algorithm Based On Stages Hybridization For Evolvable Hardware Design

Wu¹,

Wang²

2015

Proceedings of the 4th International Conference on Information Technology and Management Innovation

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“…In this work we present a method, based on evolutionary strategies, to synthesize a combinational logic network composed by SLGs fault tolerant to the environmental noise. Similar approaches have been used for evolving 100% functional circuits [5,6,7,8] with focus on fault tolerance [9,10,11,12].…”

Section: Introductionmentioning

confidence: 99%

Noise Tolerant Stochastic Logic Gate Circuits Synthesis using Genetic Algorithms

Neri¹,

Hartmann²

2015

IJCA

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In this paper we propose a method for synthesis of combinational networks using non conventional logic gates. The logic components considered are Stochastic Logic Gates (SLGs) able to change their logic functionality by means of a single control parameter and the environmental level of noise. SLGs are able to adapt their computed logic function depending on the environmental conditions. Circuits composed of SLGs are thus sensitive to changes in the environment which alter the computed logic function. We propose a solution for the synthesis of SLGs combinational networks able to produce a network operating fault tolerant in different environmental conditions, i.e. different levels of noise. Given a description of the problem, in form of a truth table, the synthesis of the network is performed by means of genetic algorithms. The proposed solution is tested with a half-adder and compared to the optimal solution found with an exhaustive search.

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Design of self-repairing control circuit for brushless DC motor based on evolvable hardware

Zhu

Yao

2017

2017 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)

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Fault Tolerant Circuit Design Using Evolutionary Algorithms

Cited by 4 publications

References 12 publications

An Improved Genetic Algorithm Based On Stages Hybridization For Evolvable Hardware Design

An Improved Genetic Algorithm Based On Stages Hybridization For Evolvable Hardware Design

Noise Tolerant Stochastic Logic Gate Circuits Synthesis using Genetic Algorithms

Design of self-repairing control circuit for brushless DC motor based on evolvable hardware

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