Abstract:In the current era of speed and recent trend of device miniaturisation, failure rates have been increased with the increase in the design complexity and the density of transistors in chip and hence reliability issues at circuit level have become more prominent and challenging. In this study, the authors propose a new static fault tolerant method called quad-gate-transistor, which uses quadded-transistor output logic with gate level quad implementation of the given circuitry to make the system defect tolerant. … Show more
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