Faster fractal image compression using quadtree recomposition

Jackson, David Jeff; Mahmoud, Wagdy; Stapleton, William A.; Gaughan, P.T.

doi:10.1016/s0262-8856(97)00020-6

Cited by 22 publications

(13 citation statements)

References 7 publications

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“…Moreover, the time spent in this computation is often wasted as a successful domainrange match may not occur for a given comparison across all considered quadtree levels. This was shown in Jackson et al [8]. It is also known that, for small tolerance values, all domain-range comparisons performed across an image may fail to produce a suitable match for all normally considered quadtree levels.…”

Section: Motivation For Hardware Architecturementioning

confidence: 87%

“…In practical implementations the search-based domain-range matching procedure normally used in fractal image compression naturally introduces significant intensive computational requirements and an unacceptably long compression time [6,9,8,19,11,20,5,16,2]. This is true even for improved methods that have been recently introduced [8,2,15,17].…”

Section: Introductionmentioning

confidence: 99%

“…This is true even for improved methods that have been recently introduced [8,2,15,17]. To relieve the computational complexity, several searchless methods have been proposed in the literature [12,21,22,23].…”

Section: Introductionmentioning

confidence: 99%

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A hardware architecture for real-time image compression using a searchless fractal image coding method

Jackson

Ren

et al. 2007

J Real-Time Image Proc

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In this paper we present a novel hardware architecture for real-time image compression implementing a fast, searchless iterated function system (SIFS) fractal coding method. In the proposed method and corresponding hardware architecture, domain blocks are fixed to a spatially neighboring area of range blocks in a manner similar to that given by Furao and Hasegawa. A quadtree structure, covering from 32 · 32 blocks down to 2 · 2 blocks, and even to single pixels, is used for partitioning. Coding of 2 · 2 blocks and single pixels is unique among current fractal coders. The hardware architecture contains units for domain construction, zig-zag transforms, range and domain mean computation, and a parallel domain-range match capable of concurrently generating a fractal code for all quadtree levels. With this efficient, parallel hardware architecture, the fractal encoding speed is improved dramatically. Additionally, attained compression performance remains comparable to traditional searchbased and other searchless methods. Experimental results, with the proposed hardware architecture implemented on an Altera APEX20K FPGA, show that the fractal encoder can encode a 512 · 512 · 8 image in approximately 8.36 ms operating at 32.05 MHz. Therefore, this architecture is seen as a feasible solution to real-time fractal image compression.

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Section: Motivation For Hardware Architecturementioning

confidence: 87%

Section: Introductionmentioning

confidence: 99%

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A hardware architecture for real-time image compression using a searchless fractal image coding method

Jackson

Ren

et al. 2007

J Real-Time Image Proc

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show abstract

“…Although, the analysis indicates that in QD approach involves many computations are performed which are not required. So instead of QD approach Quad-tree Recomposition(QR) is introduced which reduces the encoding time by removing not required calculations, without affecting the fidelity of reconstructed image [23].…”

Section: Quad-tree Partitioningmentioning

confidence: 99%

Fractal Video Compression using Block Matching Motion Estimation - A Study

Aswani¹,

Kamble²

2014

IOSRJVSP

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“…[4][5][6][7][8][9][10][11][12][13][14][15][16][17]). The quadtree representations decrease computer memory requirements and simplify algorithms in many applications dealing with two-dimensional (2D) pictures.…”

Section: Introductionmentioning

confidence: 99%

Quadtree-based representations of grid-oriented data

Vörös

2006

Image and Vision Computing

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Faster fractal image compression using quadtree recomposition

Cited by 22 publications

References 7 publications

A hardware architecture for real-time image compression using a searchless fractal image coding method

A hardware architecture for real-time image compression using a searchless fractal image coding method

Fractal Video Compression using Block Matching Motion Estimation - A Study

Quadtree-based representations of grid-oriented data

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