Fast software implementation of error detection codes

High Performance Checksum Computation for Fault-Tolerant MPI over Infiniband

“…In this paper, we consider the following algorithms: sum-plain sum of 32 bits words; XOR-XOR all 32 bits words; Adler-32, Fletcher-64 [9], Jenkins One-at-a-time [12], FNV1a [10], Knuth hashing, MurmurHash2a, Paul Hsieh Superfast-a collection of well-known fast hashing functions that can be used as error-detection (non-cryptographic) checksum; CRC-32 bits CRC computed with SSE 4.2 (non-accelerated CRC is too slow to be considered here). Algorithms sum and XOR are given as performance reference only, but are not suitable [13] to detect reliably errors on more than one bit; CRC is expected to be slow but offers the best error detection; other algorithms are expected to be a good compromise [8]. Figure 1 shows the bandwidth of these checksums on our jack cluster, equipped with dual-core Xeon X5650 at 2.67 GHz, on 32 kB blocks that fit the L1 cache.…”

“…Some works have focused on the effectiveness [13,12] of error detection for various checksums algorithms, or on the performance [8,9] of checksum computation. To our knowledge, these works have not been integrated into any MPI implementation.…”

VLSI Implementation of Parallel CRC Using Pipelining, Unfolding and Retiming

“…For example, the serial architectures of commonly used generator polynomials CRC-16 and CRC-12 have the iteration bound of 2T XOR because they have terms y 15 +y 16 and y 11 +y 12 in their generator polynomials respectively. In proposed look-ahead pipelining, 2-level pipelining is given by ( ) ( ) ( ) ( ) Fig.4 shows that the loop bound for the circuit in Fig.2 has been reduced from 2Txor to T XOR at the cost of two XOR gates and two flip flops.…”

Efficient High Hamming Distance CRCs for Embedded Networks

“…They detail various algorithms which we will discuss in Section 3. Research addressing the relative speed of various algorithms has been presented by [7,15]. Generally, performance studies deal with the effects of memory caching and number of instructions for various algorithms on high-end processors with large memory caches.…”

“…The primary drawback to the CRC is its computational cost, which is much higher than simpler error codes such as the Fletcher checksum or other addition-based checksums [7]. For the embedded domain, computational cost can be a major design factor because of the severe cost constraints on many systems.…”