Fast RSA decryption through high-radix scalable Montgomery modular multipliers

Abstract

This paper improves the quotient-pipelined high radix scalable Montgomery modular multiplier by processing w-bit and k-bit words in carry save form instead of some (w + k)-bit length operands. It directly reduces both the critical path and the area overhead of the original processing elements. Then based on this improved high-radix scalable Montgomery modular multiplier, we propose an efficient hardware architecture for RSA decryption with Chinese Remainder Theorem. With simple configuration logics, the hardware unit works in three modes: (1) scalable modular reduction for precomputation, (2) scalable Montgomery modular multiplication for modular exponentiation, where an approximation method is developed to reduce the expanded result below the modulus, and (3) scalable multiplication for post-processing. Hardware implementation shows that the proposed architecture is optimal with reference to the literature in terms of speed, area, and frequency. A 4096-bit RSA decryption in XC2V6000-6 FPGA can be completed in 11.05 ms with 14041 slices/17409 LUTs, 128 16 × 16 multipliers, and 70 kbits of block RAMs. Finally, by the use of Montogmery powering ladder the modular exponentiation unit based on the improved high radix scalable Montgomery modular multiplier can be built resistant to fault and simple power attacks. A 1024-bit modular exponentiation unit with such resistances costs about 255K NAND2 gates in .18 µm CMOS process, and one full modular exponentiation takes about 1.44 ms at 250 MHz.

A Novel Identity-Based Mutual Authentication Scheme for Vehicle Ad Hoc Networks

“…IBC can greatly reduce the amount of computation and save the storage cost, considering that RSA decryption time is relatively long. The hardware decryption method based on the Montgomery algorithm [41] can help to improve the efficiency. Therefore, our protocol is efficient and does not require the vehicle to have high-performance computing equipment.…”

High-Performance RNS Modular Exponentiation by Sum-Residue Reduction

“…So a modular reduction is required to bring this result down to [0, N − 1]. Then, suppose the result X = 2 K−t X 1 + X 0 , with X 0 < 2 K−t , K = 1024, t = 73, and N = 2 K−t N 1 + N 0 , so the quotient q = ⌊X/N⌋ can be approximated by [24]. In this way, the final result can be reduced down to R…”

High-Performance RNS Modular Exponentiation by Sum-Residue Reduction

“…Besides, there are also other Montgomery modular multipliers with parallelism. A carry-save-addition based hardware architecture is used in [9,10] to carry out continuous modular exponentiation, while quotient-pipelined high-radix scalable Montgomery modular multipliers can also be used for it [6,24]. The radix-4 scalable Montgomery modular multipliers can also be utilized for modular exponentiation with small area overheads [5,23].…”