Fast, multicore-scalable, low-fragmentation memory allocation through large virtual memory and global data structures

Aigner, Martin; Kirsch, Christoph; Lippautz, Michael; Sokolova, Ana

doi:10.1145/2814270.2814294

Cited by 25 publications

(41 citation statements)

References 23 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…This is typically the case for the pages corresponding to thread stacks, but 3 2017/3/6 also for the pages that host a data structure only accessed by the thread that allocated the structure. The first-touch policy is, however, particularly inefficient if a single thread allocates and initializes the memory for all the other threads.…”

Section: The First-touch Policymentioning

confidence: 99%

“…The interconnect load is defined as the average of the percentage of the bandwidth used on the most loaded interconnect links during each second. 3 We can classify the applications in three groups (column imbalance level of Table 1). The 11 "low" applications exhibit a low memory access imbalance of less than 85% with the first-touch policy in Linux.…”

Section: Analysis Of the Behaviorsmentioning

confidence: 99%

“…The round-4K policy prevents the large imbalance of the first-touch policy (see columns imbalance in Table 1). Carrefour tends to improve their performance because it improves their memory access locality (the interconnect load is 3 The hardware counters actually give a metric which vary between 50% when the link is idle and 80% when the link is saturated. We report only the variation of the bandwidth relative to this 30% amplitude.…”

Section: Analysis Of the Behaviorsmentioning

confidence: 99%

“…Second, our implementation may exhibit an overhead when an application often releases pages (see Section 4.2.4). Using an allocator such as scalloc [3] or llalloc [4], which only rarely releases pages, should prevent this overhead. Third, we have identified an incompatibility between the IOMMU and the first-touch policy.…”

mentioning

confidence: 99%

See 3 more Smart Citations

An interface to implement NUMA policies in the Xen hypervisor

Voron

Thomas

Quéma

et al. 2017

Proceedings of the Twelfth European Conference on Computer Systems

View full text Add to dashboard Cite

While virtualization only introduces a small overhead on machines with few cores, this is not the case on larger ones. Most of the overhead on the latter machines is caused by the Non-Uniform Memory Access (NUMA) architecture they are using. In order to reduce this overhead, this paper shows how NUMA placement heuristics can be implemented inside Xen. With an evaluation of 29 applications on a 48-core machine, we show that the NUMA placement heuristics can multiply the performance of 9 applications by more than 2.

show abstract

Section: The First-touch Policymentioning

confidence: 99%

Section: Analysis Of the Behaviorsmentioning

confidence: 99%

Section: Analysis Of the Behaviorsmentioning

confidence: 99%

mentioning

confidence: 99%

See 2 more Smart Citations

An interface to implement NUMA policies in the Xen hypervisor

Voron

Thomas

Quéma

et al. 2017

Proceedings of the Twelfth European Conference on Computer Systems

View full text Add to dashboard Cite

show abstract

“…These allocators can be used with existing simulator code by dynamic preloading of or static linking against the allocator library. We do not consider allocators that are in a research or prototype stage, such as streamflow (Schneider et al, 2006), ssmalloc (Liu and Chen, 2012), sfmalloc (Seo et al, 2011), SuperMalloc (Kuszmaul, 2015), or scalloc (Aigner et al, 2015). …”

Section: Methodsmentioning

confidence: 99%

Constructing Neuronal Network Models in Massively Parallel Environments

Ippen

Eppler

Pleßer

et al. 2017

Front. Neuroinform.

View full text Add to dashboard Cite

Recent advances in the development of data structures to represent spiking neuron network models enable us to exploit the complete memory of petascale computers for a single brain-scale network simulation. In this work, we investigate how well we can exploit the computing power of such supercomputers for the creation of neuronal networks. Using an established benchmark, we divide the runtime of simulation code into the phase of network construction and the phase during which the dynamical state is advanced in time. We find that on multi-core compute nodes network creation scales well with process-parallel code but exhibits a prohibitively large memory consumption. Thread-parallel network creation, in contrast, exhibits speedup only up to a small number of threads but has little overhead in terms of memory. We further observe that the algorithms creating instances of model neurons and their connections scale well for networks of ten thousand neurons, but do not show the same speedup for networks of millions of neurons. Our work uncovers that the lack of scaling of thread-parallel network creation is due to inadequate memory allocation strategies and demonstrates that thread-optimized memory allocators recover excellent scaling. An analysis of the loop order used for network construction reveals that more complex tests on the locality of operations significantly improve scaling and reduce runtime by allowing construction algorithms to step through large networks more efficiently than in existing code. The combination of these techniques increases performance by an order of magnitude and harnesses the increasingly parallel compute power of the compute nodes in high-performance clusters and supercomputers.

show abstract

Survey of Memory Management Techniques for HPC and Cloud Computing

Pupykina

Agosta

2019

IEEE Access

View full text Add to dashboard Cite

The emergence of new classes of HPC applications and usage models, such as real-time HPC and cloud HPC, coupled with the increasingly heterogeneous nature of HPC architectures, requires a renewed investigation of memory management solutions. Traditionally, memory is shared by an operating system using segmentation and paging techniques. At the same time, new classes of applications require Quality of Service (QoS) guarantees. As such, the typical practice of reserving a subset of the supercomputer to a single application becomes less attractive, leading to the exploration of cloud technologies. In this context, a viable scenario is that of multiple applications, with different QoS levels, coexisting on the same deeply heterogeneous HPC infrastructure and sharing resources. However, for this scenario to succeed in practice, resources, including memory, need to be allocated with a vision that includes both the application requirements and the current and future state of the overall system. In this survey, challenges of memory management in HPC and Cloud Computing, different memory management systems and optimisation techniques to increase memory utilisation are discussed in detail. INDEX TERMS Clouds, high performance computing, memory management, resource management. ANNA PUPYKINA received the higher education degree in data processing and control systems engineering from Samara State Aerospace University, Russia, in 2009. She is currently pursuing the Ph.D. degree with the Politecnico di Milano, under the supervision of Prof. G. Agosta. She was with Russian State Humanitarian University (RSUH), Togliatti, and also with the Department of Applied Mathematics and Informatics, Togliatti State University (TSU). Her main research interests include runtime management algorithms and programming model extensions for deeply heterogeneous systems. GIOVANNI AGOSTA received the Laurea degree in computer engineering and the Ph.D. degree in information technology from the Politecnico di Milano, Italy, in 2000 and 2004, respectively. He is currently a tenured Researcher. He has authored more than 80 articles in international journals, conferences, and workshops. His main research interest includes compiler technology. He was a recipient of four HiPEAC Awards and three Best Paper Awards. He has been involved in eight European funded projects, since 2010, holding workpackage and task leader responsibilities. He is a Full Member of the HiPEAC Network and the Organizer of two workshops colocated with the HiPEAC Conference.

show abstract

Fast, multicore-scalable, low-fragmentation memory allocation through large virtual memory and global data structures

Cited by 25 publications

References 23 publications

An interface to implement NUMA policies in the Xen hypervisor

An interface to implement NUMA policies in the Xen hypervisor

Constructing Neuronal Network Models in Massively Parallel Environments

Survey of Memory Management Techniques for HPC and Cloud Computing

Contact Info

Product

Resources

About