Fast Intra Mode Decision Algorithm Using Directional Gradients for H.264

Jeon, Yeong-Il; Han, Chanhee; Lee, Si-Woong; Kang, Hyun‐Soo

doi:10.1109/cisp.2009.5300918

Cited by 2 publications

(7 citation statements)

References 5 publications

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“…Recently, several works have proposed fast mode decision algorithms for the H.264/AVC encoding process. All of them aim at the reduction of the decision process complexity by decreasing the number of possible encoding modes considered in the RDO process [5][6][7][8][9][10][11][12].…”

Section: Previous Workmentioning

confidence: 99%

“…The mode decision proposed in [6] chooses the best intra-frame mode based on the analysis of the directional gradient of each block. The two modes with the lowest gradient levels are selected and the RDO technique is applied to both of them and the DC mode.…”

Section: Previous Workmentioning

confidence: 99%

“…Recently, several works have proposed fast mode decision algorithms and VLSI designs for the H.264/AVC encoding process [5][6][7][8][9][10][11][12]. Even though all these works apply some heuristics at a certain point of the mode decision process, all of them use the RDO technique in some stage to select prediction modes and block sizes, limiting the reduction in terms of computational complexity and energy consumption of a fully RDO-based decision.…”

Section: Introductionmentioning

confidence: 99%

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Low-Complexity Hierarchical Mode Decision Algorithms Targeting VLSI Architecture Design for the H.264/AVC Video Encoder

et al. 2012

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In H.264/AVC, the encoding process can occur according to one of the 13 intraframe coding modes or according to one of the 8 available interframes block sizes, besides the SKIP mode. In the Joint Model reference software, the choice of the best mode is performed through exhaustive executions of the entire encoding process, which significantly increases the encoder's computational complexity and sometimes even forbids its use in real-time applications. Considering this context, this work proposes a set of heuristic algorithms targeting hardware architectures that lead to earlier selection of one encoding mode. The amount of repetitions of the encoding process is reduced by 47 times, at the cost of a relatively small cost in compression performance. When compared to other works, the fast hierarchical mode decision results are expressively more satisfactory in terms of computational complexity reduction, quality, and bit rate. The low-complexity mode decision architecture proposed is thus a very good option for real-time coding of high-resolution videos. The solution is especially interesting for embedded and mobile applications with support to multimedia systems, since it yields good compression rates and image quality with a very high reduction in the encoder complexity.

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Section: Previous Workmentioning

confidence: 99%

Section: Previous Workmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Low-Complexity Hierarchical Mode Decision Algorithms Targeting VLSI Architecture Design for the H.264/AVC Video Encoder

et al. 2012

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“…Therefore, the hardware cost will be increased dramatically owing to the hundreds of candidate modes [5], [6]. 1051 To reduce the number of candidate modes without a decline in RD performance, several fast mode decision algorithms have been investigated [5], [6]. For example, the authors in [5] proposed a fast intra prediction mode decision method with directional gradients.…”

Section: Introductionmentioning

confidence: 99%

“…1051 To reduce the number of candidate modes without a decline in RD performance, several fast mode decision algorithms have been investigated [5], [6]. For example, the authors in [5] proposed a fast intra prediction mode decision method with directional gradients. For 16 × 16 intra prediction modes, the gradients of three directions, i.e., vertical, horizontal, and plane, are determined.…”

Section: Introductionmentioning

confidence: 99%

A Two-Stage Rate Control Mechanism for RDO-Based H.264/AVC Encoders

Chang

Kuo

Liu

2011

IEEE Trans. Circuits Syst. Video Technol.

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This paper jointly considers the mechanisms of rate control and the rate-distortion optimization (RDO) for the H.264/AVC hardware encoder. The proposed architecture performs intra prediction and inter prediction with our rate control mechanism in the first two stages. In addition, a low complexity macroblock (MB)-level mean absolute difference (MAD) prediction algorithm which considers both the motion information and the MAD value in the neighboring and current MBs is proposed. The proposed rate control algorithm can reduce the computational complexity and does not suffer from data dependency problems which may decrease the rate-distortion performance, thus it is suitable for H.264/AVC hardware encoders. Furthermore, the RDO-based architecture for the H.264/AVC encoder reduces the number of accurate rate-distortion cost calculators while maintaining the high rate-distortion performance. Experimental results show that the proposed rate control algorithm with the RDO-based architecture can improve the ratedistortion performance of H.264/AVC. Index Terms-H.264/AVC, rate control, rate-distortion optimization.

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Fast Intra Mode Decision Algorithm Using Directional Gradients for H.264

Cited by 2 publications

References 5 publications

Low-Complexity Hierarchical Mode Decision Algorithms Targeting VLSI Architecture Design for the H.264/AVC Video Encoder

Low-Complexity Hierarchical Mode Decision Algorithms Targeting VLSI Architecture Design for the H.264/AVC Video Encoder

A Two-Stage Rate Control Mechanism for RDO-Based H.264/AVC Encoders

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