Fast Implementation of AES Modes Based on Turing Architecture

Chugh, Garvit; Saji, Samanyu A.; Bhati, Nitesh Singh

doi:10.1007/978-3-031-23724-9_44

Cited by 1 publication

(1 citation statement)

References 12 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In addition, research on ECC using GPU architecture is continuously being conducted [31][32][33]. Research on block cipher algorithms and hash functions in GPU architectures has also been published [34][35][36][37][38][39][40][41]. However, there are no studies of hash functions using AVX-512 and LSH optimization research implementation using GPUs.…”

Section: Introductionmentioning

confidence: 99%

Parallel Implementation of Lightweight Secure Hash Algorithm on CPU and GPU Environments

Choi,

Seo

2024

Electronics

View full text Add to dashboard Cite

Currently, cryptographic hash functions are widely used in various applications, including message authentication codes, cryptographic random generators, digital signatures, key derivation functions, and post-quantum algorithms. Notably, they play a vital role in establishing secure communication between servers and clients. Specifically, servers often need to compute a large number of hash functions simultaneously to provide smooth services to connected clients. In this paper, we present highly optimized parallel implementations of Lightweight Secure Hash (LSH), a hash algorithm developed in Korea, on server sides. To optimize LSH performance, we leverage two parallel architectures: AVX-512 on high-end CPUs and NVIDIA GPUs. In essence, we introduce a word-level parallel processing design suitable for AVX-512 instruction sets and a data parallel processing design appropriate for the NVIDIA CUDA platform. In the former approach, we parallelize the core functions of LSH using AVX-512 registers and instructions. As a result, our first implementation achieves a performance improvement of up to 50.37% compared to the latest LSH AVX-2 implementation. In the latter approach, we optimize the core operation of LSH with CUDA PTX assembly and apply a coalesced memory access pattern. Furthermore, we determine the optimal number of blocks/threads configuration and CUDA streams for RTX 2080Ti and RTX 3090. Consequently, in the RTX 3090 architecture, our optimized CUDA implementation achieves about a 180.62% performance improvement compared with the initially ported LSH implementation to the CUDA platform. As far as we know, this is the first work on optimizing LSH with AVX-512 and NVIDIA GPU. The proposed implementation methodologies can be used alone or together in a server environment to achieve the maximum throughput of LSH computation.

show abstract