Fast evaluation of elementary mathematical functions with correctly rounded last bit

Ziv, Avi

doi:10.1145/114697.116813

Cited by 75 publications

(53 citation statements)

References 9 publications

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“…A first method introduced by Ziv [3] was to compute an approximation y of a function value f (x) with a bounded error of ǫ (containing mathematical and roundoff errors). As rounding modes are monotonic, if y − ǫ and y + ǫ round to the same floating-point number, f (x) does too : otherwise the correct rounding cannot be determined (see Fig.…”

Section: State Of the Artmentioning

confidence: 99%

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GPU-Accelerated Generation of Correctly Rounded Elementary Functions

Fortin

Gouicem

Graillat

2016

ACM Trans. Math. Softw.

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Abstract-The IEEE 754-2008 standard recommends the correct rounding of some elementary functions. This requires to solve the Table Maker's Dilemma which implies a huge amount of CPU computation time. We consider in this paper accelerating such computations, namely Lefèvre algorithm on Graphics Processing Units (GPUs) which are massively parallel architectures with a partial SIMD execution (Single Instruction Multiple Data).We first propose an analysis of the Lefèvre hard-to-round argument search using the concept of continued fractions. We then propose a new parallel search algorithm much more efficient on GPU thanks to its more regular control flow. We also present an efficient hybrid CPU-GPU deployment of the generation of the polynomial approximations required in Lefèvre algorithm. In the end, we manage to obtain overall speedups up to 53.4x on one GPU over a sequential CPU execution, and up to 7.1x over a multi-core CPU, which enable a much faster solving of the Table Maker's Dilemma for the double precision format.

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Section: State Of the Artmentioning

confidence: 99%

“…12.2], 2) find (p, ǫ) HR-cases with ad hoc methods such as Lefèvre or SLZ algorithms, 3) find the hardest-to-round among the (p, ǫ) HR-cases using Ziv method [3]. The most compute intensive step in this method is the second one.…”

Section: Definition 4 (mentioning

confidence: 99%

GPU-Accelerated Generation of Correctly Rounded Elementary Functions

Fortin

Gouicem

Graillat

2016

ACM Trans. Math. Softw.

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“…The mpfr project [8] aims to remedy this shortcoming; but the underlying basis for such algorithms does not seem to have been published. Ziv and others [25,9] have proposed to use arbitrary precision computation to achieve exact rounding. The problem with a naive application of arbitrary precision computation is termination.…”

Section: Fig 1 Elementary Functions In the Lia-2mentioning

confidence: 99%

Foundations of Exact Rounding

Yap

2009

WALCOM: Algorithms and Computation

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Abstract. Exact rounding of numbers and functions is a fundamental computational problem. This paper introduces the mathematical and computational foundations for exact rounding. We show that all the elementary functions in ISO standard (ISO/IEC 10967) for Language Independent Arithmetic can be exactly rounded, in any format, and to any precision. Moreover, a priori complexity bounds can be given for these rounding problems. Our conclusions are derived from results in transcendental number theory.

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“…Por ejemplo, la librería LIBULTIM realiza cálculos intermedios con hasta 800 bits de precisión de ahí la lentitud de la misma. Normalmente, estas librerías suelen utilizar una estrategia "Ziv's multinivel" [13]. Primero las funciones son evaluadas con una precisión relativamente baja y en el caso de que la función no pueda ser redondeada correctamente, se aumentará la precisión.…”

Section: Introductionunclassified

Implementaciones de Funciones Elementales en Dispositivos FPGA

Mazon¹

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In this thesis we have designed several hardware architectures of some typical digital subsystems for high performance communications systems, aiming at optimized implementations for these systems. The work has focused on two areas: the approximation of elementary functions, specifically the logarithm and arctangent, and the design of an emulator of additive Gaussian noise channel. The architectures have been designed at all times with the objective to achieve an efficient implementation in Field Programmable Gate Arrays devices (FPGAs), due to its increasing use in digital high performance communications systems. For the approximation of logarithm we have proposed two different architectures, one based on the use of multipartite table methods and the other based on the Mitchell's approximation with two correction stages: a piecewise linear interpolation with power-of-two slopes and truncated mantissa, and a LUT-based correction stage that corrects the piecewise interpolation error. A first architecture for the approximation of atan(y/x) is based on the computation of the reciprocal of x and the arctangent approximation, using multipartite Look-up tables (LUTs). This proposal reduces the power consumption compared to the best techniques described in the literature, such based on CORDIC. A second strategy for the approximation of atan(y/x) is based on logarithmic transformations, which transforms the calculation of the division of two inputs in a simple subtraction and requires the computation of atan(2 w ). This second strategy has resulted in two architectures, a first in which both the logarithm and atan(2 w ) have been implemented using multipartite LUTs, also combined with the use of non-uniform segmentation techniques in the calculation of atan(2 w ), and a second architecture using a piecewise linear interpolation with power-of-two slopes and correction tables. The results obtained with this strategy improve the first architecture discussed. Two architectures for the approximation of arctangent and one for the logarithm have resulted in three publications in internationals journals. We also have proposed several architectures for a Gaussian white noise generator. The designs are based on the Inversion method, specifically approximating the inverse of cumulative distributions functions by polynomial interpolation and non-uniform segmentation. These architectures offer its output a standard deviation of ±13.1σ and 13 fractional bits, higher values than practically all hardware generators present in the literature, employing, in comparison, fewer FPGA resources. Compared to Gaussian channel implementations based on the inversion method presented by other authors, our architectures achieve a significant reduction in area partially or completely eliminating the barrel-shifter. The results for Gaussian channel emulator have been sent to an international journal, being currently under review process.

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Fast evaluation of elementary mathematical functions with correctly rounded last bit

Cited by 75 publications

References 9 publications

GPU-Accelerated Generation of Correctly Rounded Elementary Functions

GPU-Accelerated Generation of Correctly Rounded Elementary Functions

Foundations of Exact Rounding

Implementaciones de Funciones Elementales en Dispositivos FPGA

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