Fast and low-area TPGs based on T-type flip-flops can be easily integrated to the scan path

Hlawiczka, A.; Kristof, A.

doi:10.1109/etw.2000.873794

Cited by 9 publications

(5 citation statements)

References 2 publications

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“…Hopefully, the suitable DT-LFSRs shall be found to enable the construction of DT-LFSR-TPG modules with only a slight number of redundant D and T flip-flops. Another opportunity to significantly reduce the hardware overhead introduced by a DT-LFSR Test Pattern Generator lies in the application of purposefully designed T-type flip-flops with low implementation cost (i.e., with a little area occupied on a silicon substrate), similarly to the solution disclosed in [65]. Then, the original seeding method can be applied to T-type flip-flops, as shown in [65,66].…”

Section: Discussionmentioning

confidence: 99%

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A New, Fast Pseudo-Random Pattern Generator for Advanced Logic Built-In Self-Test Structures

Garbolino

2021

Applied Sciences

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Digital cores that are currently incorporated into advanced Systems on Chip (SoC) frequently include Logic Built-In Self-Test (LBIST) modules with the Self-Test Using MISR/Parallel Shift Register Sequence Generator (STUMPS) architecture. Such a solution always comprises a Pseudo-Random Pattern Generator (PRPG), usually designed as a Linear Feedback Shift Register (LFSR) with a phase shifter attached to the register and arranged as a network of XOR gates. This study discloses an original and innovative structure of such a PRPG unit referred to as the DT-LFSR-TPG module that needs no phase shifter. The module is designed as a set of identical linear registers of the DT-LFSR type with the same primitive polynomial. Each register has a form of a ring made up exclusively of D and T flip-flops. This study is focused on the investigation of those parameters of DT-LFSR registers that are essential to use these registers as components of PRPG modules. The investigated parameters include phase shifts and the correlation between sequences of bits appearing at outputs of T flip-flops, implementation cost, and the maximum frequency of the register operation. It is demonstrated that PRPG modules of the DT‑LFSR‑TPG type enable much higher phase shifts and substantially higher operation frequencies as compared to competitive solutions. Such modules can also drive significantly more scan paths than other PRPGs described in reference studies and based on phase shifters. However, the cost of the foregoing advantages of DT-LFSR-TPG modules is the larger hardware overhead associated with the implementation of the solution proposed.

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Section: Discussionmentioning

confidence: 99%

“…A PRPG module is usually designed as a shift register with linear feedback (Linear Feedback Shift Register-LFSR) [3] (pp. [65][66][67][68][69][70][71][176][177], although Cellular Automata (CA) can also be used for these purposes [3] (pp. 72-75), [10][11][12][13].…”

Section: Introductionmentioning

confidence: 99%

A New, Fast Pseudo-Random Pattern Generator for Advanced Logic Built-In Self-Test Structures

Garbolino

2021

Applied Sciences

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“…Mostly, the proposed LFSR structures are based on Dtype flip-flops, while in recent years LFSR composed of Dtype and T-type flip-flops or the one containing solely Ttype flip-flops is gaining popularity due to its low area overhead and high operating speed [17,19]. Some applications of such a type of LFSRs can be found in [18,20,33].…”

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confidence: 98%

Genetic algorithm for test pattern generator design

Papa

2010

Appl Intell

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The paper describes an approach for the generation of a deterministic test pattern generator logic, which is composed of D-type and T-type flip-flops. This approach employs a genetic algorithm that searches for an acceptable practical solution in a large space of possible implementations. In contrast to conventional approaches the proposed one reduces the gate count of a built-in self-test structure by concurrent optimization of multiple parameters that influence the final solution. The optimization includes the search for: the optimal combination of register cells type; the presence of inverters at inputs and outputs; the test patterns order in the generated test sequence; and the bit order of test patterns. Results of benchmark experiments and comparison with similar studies demonstrate the efficiency of the proposed evolutionary approach.

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“…The proposed LFSR structures are based on D-type flip-flops, while in recent years LFSR composed of D-type and T-type flip-flops or even of T-type flip-flops only, has been gaining popularity. The main reason is its low area overhead and high operating speed (Garbolino & Hlawiczka, 1999;Garbolino et al, 2000). Some applications of such a type of LFSRs can be found in (Garbolino & Hlawiczka, 2002;Garbolino & Papa, 2008;Novák et al, 2004).…”

Section: Introductionmentioning

confidence: 99%

Stochastic Approach to Test Pattern Generator Design

Papa¹

2011

Stochastic Optimization - Seeing the Optimal for the Uncertain

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Fast and low-area TPGs based on T-type flip-flops can be easily integrated to the scan path

Cited by 9 publications

References 2 publications

A New, Fast Pseudo-Random Pattern Generator for Advanced Logic Built-In Self-Test Structures

A New, Fast Pseudo-Random Pattern Generator for Advanced Logic Built-In Self-Test Structures

Genetic algorithm for test pattern generator design

Stochastic Approach to Test Pattern Generator Design

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