Plenoptic cameras are receiving increased 5 attention in scientific and commercial applications because 6 they capture the entire structure of light in a scene, en-7 abling optical transforms (such as focusing) to be applied 8 computationally after the fact, rather than once and for all at 9 the time a picture is taken. In many settings, real-time inter-10 active performance is also desired, which in turn requires 11 significant computational power due to the large amount 12 of data required to represent a plenoptic image. Although 13 GPUs have been shown to provide acceptable performance 14 for real-time plenoptic rendering, their cost and power 15 requirements make them prohibitive for embedded uses 16 (such as in-camera). On the other hand, the computation 17 to accomplish plenoptic rendering is well structured, 18 suggesting the use of specialized hardware. Accordingly, 19 this paper presents an array of switch-driven finite impulse 20 response filters, implemented with FPGA to accomplish Q1 21 high-throughput spatial-domain rendering. The proposed 22 architecture provides a power-efficient rendering hardware 23 design suitable for full-video applications as required in 24 broadcasting or cinematography. A benchmark assess-25 ment of the proposed hardware implementation shows that 26 real-time performance can readily be achieved, with a one 27 order of magnitude performance improvement over a GPU 28 implementation and three orders of magnitude performance 29 improvement over a general-purpose CPU implementation.