1990
DOI: 10.1117/12.978598
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Failure And Yield Analysis Techniques For Readout Devices Tested In A High Throughput Automated Wafer Probing Environment

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Cited by 3 publications
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“…[1 , [4][5][6]). Here were chosen CCD-type circuits because of the possibility to realize the lower level of noise, compared to such kind of CMOS-type circuits.…”
Section: Ccd and Circuit Approachesmentioning
confidence: 99%
“…[1 , [4][5][6]). Here were chosen CCD-type circuits because of the possibility to realize the lower level of noise, compared to such kind of CMOS-type circuits.…”
Section: Ccd and Circuit Approachesmentioning
confidence: 99%
“…There are several possible main types of architecture and circuit approaches for readout electronics (see, e.g., [1,[4][5][6]). We chose CCD-type circuits because of the lower level of noise as compared with their CMOS-type analogues.…”
Section: Ccd and Circuit Approachesmentioning
confidence: 99%
“…Testing the wafer-located chips [6] is of an independent interest, as it allows appraising the yield prior hybridization. For the purging purposes, a construction of testing circuits was designed and incorporated into the readout devices.…”
mentioning
confidence: 99%