Facilitating efficient synchronization of asymmetric threads on hyper-threaded processors

Anastopoulos, Nikos; Koziris, Nectarios

doi:10.1109/ipdps.2008.4536358

Cited by 20 publications

(12 citation statements)

References 5 publications

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“…In this area, Kawano et al [23] proposed a fine-grained parallel method which uses hardware primitives to implement highly efficient task scheduling. Our technique is about thread synchronization mechanisms and the most relevant work was done by Anastopoulos et al [3]. The main difference from our work is that the waitrsv primitive provided by WSP is for user-level applications, while the monitor/mwait primitives described in [3] are at privilege level 0.…”

Section: Related Workmentioning

confidence: 98%

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Zou

Gedik

Wang

2011

Proceedings of the 5th ACM International Conference on Distributed Event-Based System

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The proliferation of mobile devices, coupled with continuous connectivity, has resulted in a world where massive amounts of data is being produced, on a daily basis, as a result of online interactions between people. These interactions are often captured as relationships in a social network graph, by service providers such as mobile carriers or social web applications. Social network analysis is becoming a common technique for extracting business intelligence from social network graphs in order to improve customer experience and provide better service. Some applications in this domain require processing massive data flows with high-throughput and low-latency, in order to deliver timely results. SpamWatcher is a streaming social network analysis application that fits this description. It is used for real-time filtering of short messages in mobile communications, with the goal of preventing spam. The ever increasing volume of mobile users and rates of messages make realtime detection of spam a challenging problem with respect to performance and scalability. In this paper, we present a solution for the SpamWatcher application using the IBM wire-speed processor -a system-on-a-chip with specialized co-processors and integrated network I/O. This solution goes beyond the state-of-the-art by (i) using a novel implementation technique that takes advantage of the pattern matching accelerator to minimize the latency of spam detection, and (ii) employing hardware primitives to reduce the overhead caused by thread synchronization in order to achieve good scalability with respect to number of cores used. Furthermore, the solution is implemented on System S -a commercial-grade stream processing middleware. We evaluate our approach using real-world data sets and experimentally demonstrate the substantial performance improvements it achieves compared to previously published results.

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Section: Related Workmentioning

confidence: 98%

“…The waitrsv primitive allows a thread to wait on a previously established reservation and wake up when that reservation is lost. We use waitrsv in a manner similar to monitor/mwait [3], as a more efficient way to perform fine-grained synchronization.…”

Section: Wsp Overviewmentioning

confidence: 99%

SpamWatcher

Zou

Gedik

Wang

2011

Proceedings of the 5th ACM International Conference on Distributed Event-Based System

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“…We present two synthetic benchmark applications. The former application has been designed to assess one-way notification; a similar test is also used in [1] for analogous purposes. The latter one targets locking mechanisms, and its design has been inspired by [5].…”

Section: Benchmark Applicationsmentioning

confidence: 99%

Evaluation of Architectural Supports for Fine-Grained Synchronization Mechanisms

Matteis¹,

Luporini²,

Mencagli³

et al. 2013

Artificial Intelligence and Applications / 794: Modelling, Identification and Control / 795: Parallel and Distributed Computing

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The advent of multi-/many-core architectures demands efficient\ud \ud run-time supports to sustain parallel applications\ud \ud scalability. Synchronization mechanisms should be optimized\ud \ud in order to account for different scenarios, such\ud \ud as the interaction between threads executed on different\ud \ud cores as well as intra-core synchronization, i.e. involving\ud \ud threads executed on hardware contexts of the same core.\ud \ud In this perspective, we describe the design issues of two\ud \ud notable mechanisms for shared-memory parallel computations.\ud \ud We point out how specific architectural supports, like\ud \ud hardware cache coherence and core-to-core interconnection\ud \ud networks, make it possible to design optimized implementations\ud \ud of such mechanisms. In this paper we discuss\ud \ud experimental results on three representative architectures:\ud \ud a flagship Intel multi-core and two interesting network processors.\ud \ud The final result helps to untangle the complex implementation\ud \ud space of synchronization mechanisms.\ud \ud KEY WORDS\ud \ud Synchronization, Locking, Simultaneous Multi-Threading,\ud \ud Busy-Waiting, Multi-cores, Network Processors

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“…The mwait instruction uses the state of the monitor hardware to save power. Note that the monitor/mwait instructions have been used in the Linux idle process [22] and several researches [23,24]. Figure 7 demonstrates how we use monitor/mwait instructions.…”

Section: The Design and Implementationmentioning

confidence: 99%

Towards scalability collapse behavior on multicores

Cui

Chen

Shi

2012

Concurrency and Computation

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SUMMARYMulticore processor systems have become mainstream. To release the full potential of multiple cores, applications are programmed to be parallel to keep every core busy. Unfortunately, lock contention within operating systems can limit the scalability so seriously that use of more cores leads to reduced throughput (scalability collapse). To understand and characterize the collapse behavior easily, a discrete‐event simulation model, which considers both the sequential execution of critical sections and the overhead of hardware resource contention, is designed and implemented. By the use of the model, we observe that the percentage of time used to wait for locks and the number of tasks requesting for a lock have a significant correlation with the occurrence of scalability collapse. On the basis of these observations, two new techniques (lock contention aware scheduler and requester‐based adaptive lock) are proposed to remove the scalability collapse on multicores. The proposed methods are implemented in the Linux kernel 2.6.29.4 and evaluated on an AMD 32‐core system to verify their effectiveness. By using micro‐benchmarks and macro‐benchmarks, we find that these methods can remove scalability collapse totally for four of five workloads exhibiting the collapse behavior. For one workload that does not suffer scalability collapse, these proposed methods only introduce negligible overhead. Copyright © 2012 John Wiley & Sons, Ltd.

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Facilitating efficient synchronization of asymmetric threads on hyper-threaded processors

Cited by 20 publications

References 5 publications

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Evaluation of Architectural Supports for Fine-Grained Synchronization Mechanisms

Towards scalability collapse behavior on multicores

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