The 8th Annual IEEE International Conference on Nano/Micro Engineered and Molecular Systems 2013
DOI: 10.1109/nems.2013.6559723
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Fabrication of silicon nanopillars array for developing PCs sensor

Abstract: This study proposed the use of combined nanosphere lithography (NSL) and photo-assisted electrochemical etching (PAECE) to generate arrayed nano-pillar with high aspect ratio on silicon wafer, and then used for the application of photonic crystals (PCs) Sensor. The experiment result indicates the NSL can conveniently define nano-array and PAECE technique can effectively yield nano-pores and nano-pillars. The nano-pore, depth of 2.3 m and diameter of 90 nm, was generated by 1 V PAECE. When the bias of PAECE was… Show more

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