Fabrication of 0.2 μm large scale integrated circuits using synchrotron radiation x-ray lithography

Abstract

Articles you may be interested inX-ray mask fabrication technology for 0.1 μm very large scale integrated circuits Combining and matching optical, electron-beam, and x-ray lithographies in the fabrication of Si complementary metal-oxide-semiconductor circuits with 0.1 and sub-0.1 μm features Lithography and fabrication processes for sub-100 nm scale complementary metal-oxide semiconductor

Transient Characteristics on Super-Steep Subthreshold Slope “PN-Body Tied SOI-FET” — Simulation and Pulse Measurement —

“…On turn-on, a nearzero delay was observed with the floating-body SOI-FET. This can be expected, because the gate delay of the 0.2 μm MOSFET technology is below 1 ns [27]. This suggests that the WGFMU data below the settling time, which are used in later measurement results, are also expected to be reliable.…”

Current status and issues of X-ray mask

“…The test device fabrication of the complementary metal-oxide-semiconductor (CMOS) / separation by implanted oxygen (SIMOX) gate array LSIs for high-performance communication systems was carried out by applying X-ray lithography to 11 critical levels of active, gate, contacts, via-holes, and metallization layers from 1995 [3]. Critical dimenvion control in 0.2 p gate patterns was determined as 0.187 1-0.017 pm including the mask CD error.…”

“…However, device applications using X-ray lithography wctre not able to be carried out until the synchrotron radiation (SR) ring was developed. Since a strong X-ray flux can easily be obtained from compact storage rings [2], generally througlh the use of super conducting magnets, the study of X-ray Jithography has accelerated in many ,absorber <---membrane ~ Si wafer frame companies both in Japan [3] and the U.S.A. [4]. Recently, resolution using X-ray lithography has been demonstrated at dimensions down to 70 nm and even below that [5].…”