Fabrication and room-temperature characterization of a silicon self-assembled quantum-dot transistor

Abstract

A quantum-dot transistor based on silicon self-assembled quantum dots has been fabricated. The device shows staircases and oscillations in the drain current at room temperature. These data are interpreted as due to single electron tunneling through the dots located in the shortest current path between the source and the drain electrodes. The dot size calculated from the data is ∼7 nm, which is consistent with the size of the self-assembled dots incorporated in the transistor.

A high-speed silicon-based few-electron memory with metal– oxide–semiconductor field-effect transistor gain element

“…Alternatively, a different type of SET may be used. Coulomb blockade effects have been observed at room temperature in granular silicon SETs, 11 and the present limitations of nanoscale lithography are technological rather than fundamental.…”

Optical Properties of Nanostructured Silicon

“…The other methods to produce porous silicon-related nanostructures include reactive sputtering [17], solgel techniques [18], SiO 2 implantation [19], selfassembly [20], growth in inverse micelles [21,22], laser ablation [23], thermal annealing [24][25][26], thermal vaporization [27,28], decomposition of silanes [29][30][31][32][33], solution synthesis [34][35][36], hybrid techniques [37], and plasma processing [38][39][40].…”

Characterization of Deposited Nanocrystalline Silicon by Spectroscopic Ellipsometry

“…[3]. The effect of the deposition parameters on nanostructure size and density are investigated [4,5] using highly reliable techniques for the sample observation such as Scanning Electron Microscopy (SEM) and Transmission Electron Microscopy (TEM) [6]. However, these techniques are destructive and in some cases it would be suitable to avoid this limitation.…”