Fabrication and characterization of a nano-convex-embedded Si MOSFET for nano-scale electrical discrimination

Abstract

To demonstrate electric discrimination of the nano-pattern for nano-artifact metrics, we fabricated and characterized a nano-convex-embedded Si MOSFET. The concept of electrical discrimination is to embed the nanostructure between the gate oxide and the Si channel of the MOSFET, and reflect the structure in the drain current. Spatial resolution in the channel direction is achieved by the drain voltage dependence of the channel pinch off position. The fabricated device with a nano-convex showed the increase of the on-resistance in the linear region and the increase of the drain conductance in the saturation region. These behaviors could be reproduced by the device simulation. The transfer characteristics in the subthreshold region showed the shift of the drain current curve to the positive voltage side by embedding a nano-convex. The overall behaviors were explained by the formation of a potential barrier in the channel under the nano-convex and its drain voltage dependence.

A study on sensitivity to an embedded nanostructure in a micrometer-channel-length Si MOSFET

“…Prototype devices embedding nano-convex structures have been fabricated, and modulation of the drain current has been observed. 22) However, the fabricated device often showed smaller current modulation than that expected from the device simulation. Against this background, in this paper, we investigate the sensitivity to the nanostructures embedded in a micrometer-channel-length Si MOSFET in an experiment and device simulation.…”

“…The designed nano-convex height was H = 50 nm to clearly show the effect of the embedding nanoconvex, which was larger than 30 nm in the previous device. 22) The electrical measurement was made on the fabricated devices at room temperature by using a conventional semiconductor parameter analyzer.…”

“…The channel length was L = 2 μm, which was smaller than that of the previously reported devices with L = 7 and 12 μm. 22) The channel width W was 10 μm. The nano-convex was placed at ΔD = 300 nm from the drain edge.…”

“…To detect the nano-pattern information in the y-direction, we use the V DS dependence of the channel pinch-off position, L P . Assuming that I DS in the saturation region is independent of L p , I DS in an n-channel MOSFET is deduced from the gradual channel approximation as follows: 22)…”