Fabrication and applications of lift-off vertical-cavity surface-emitting laser (VCSEL) disks

Abstract

Vertical cavity surface emitting lasers (VCSELs) are prepared by standard epitaxial crystal growth techniques on GaAs substrates. The VCSELs include A1GaAs distributed Bragg reflectors (DBRs) and selectively oxidized AlAs or A1GaAs current confinement/optical wave-guiding layers. An additional one-lambda-thick selectively oxidized AlAs layer is placed beneath the VCSEL and used as a sacrificial layer. The entire VCSEL disk, geometrically defined by first etching a mesa down into the GaAs substrate, is separated from the substrate by selectively removing the sacrificial Aloxide layer by wet chemical etching. The lift-off VCSEL disks designed for emission at 980 nanometers have a typical diameter of 10 to 50 micrometers and a typical thickness of 7 to 8 micrometers. In this paper I present the design, fabrication, and potential applications of lift-off VCSEL disks.

High Speed VCSELs for Optical Interconnects

“…This is especially important for chip-to-chip and on-chip optical interconnects, where the main trend is the vertical integration of chips and interconnects [147]. For integration of VCSELs to CMOS chips novel concepts, e. g. lift-off VCSELs [148], [149], should be intensively investigated. The reward will be efficient, low power, reliable, readily positionable VCSELs operating at ultra-high speed, enabling realization of the next generations of optical interconnects.…”

Ultrafast Nanophotonic Devices For Optical Interconnects

“…Preferably, the optical components must be directly integrated with the ICs. 7 As illustrated in Fig. 6, the planar design of VCSELs and top-illuminated photodetectors provides a unique vertical integration opportunity within the standard CMOS technology, because wafer-separated devices can be effectively "printed" onto CMOS ICs.…”

Compliant, Heterogeneously Integrated GaAs Micro‐VCSELs towards Wearable and Implantable Integrated Optoelectronics Platforms

“…Furthermore, VCSELs, typically built on rigid and brittle semiconductor wafers, restricted their capacity to integrate effectively onto systems with a soft, non‐planar interface, which can be extremely useful for many unconventional applications . Whereas a number of different approaches such as flip‐chip integration, wafer bonding, fluidic assembly, epitaxial lift‐off (ELO), and appliqué have been developed for integrating VCSELs on non‐native substrates with their own advantages, none of them are suitable for commercial implementation and for achieving systems that satisfy all of above‐described features due to many difficult and persistent challenges including little or no control over areal coverage and spatial layout, compromised performance during the fabrication and assembly (e.g., etching or wafer bonding), poor cost‐effectiveness and low throughput, as well as limited choices of substrate materials. Although the conventional ELO process has been successfully used for solar cells and other optoelectronic devices in the past decades, its application to VCSELs remained great challenges owing to significant damages in active materials such as mirror layers and quantum wells during the sacrificial removal of AlAs, and resulting strongly deteriorated device performance.…”