Extremely high simulated ballistic currents in triple-heterojunction tunnel transistors

Long, Pengyu; Povolotskyi, Michael; Huang, Jun; Ilatikhameneh, Hesameddin; Ameen, Tarek A.; Rahman, Rajib; Kubis, Tillmann; Klimeck, Gerhard; Rodwell, M.J.W.

doi:10.1109/drc.2016.7548424

Cited by 8 publications

(9 citation statements)

References 2 publications

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“…We consider n-type 3HJ TFETs with double-gate UTB structures [11]. The device geometry and the optimized design parameters are shown in Fig.…”

Section: The Triple-heterojunction Designmentioning

confidence: 99%

“…As shown in Refs. [11], [13], the band offsets greatly enhance the electric field at the GaSb/InAs tunnel junction and create two resonant states in the GaSb and InAs quantum wells, improving the tunnel probability at ON state. The larger band gap and transport effective mass of the (InAs) x (AlSb) 1−x channel, compared with the original InAs channel, also reduce the ambipolar and the source-to-drain tunneling leakage in the sub-threshold region.…”

Section: The Triple-heterojunction Designmentioning

confidence: 99%

“…A number of designs have been proposed to further improve the performance of the GaSb/InAs HJ TFETs [5]- [14]. Among these designs, the triple HJ (3HJ) designs [11]- [14] significantly boost the tunnel probability of the HJ TFETs by adding two additional, properly designed, HJs: one in the source and the other in the channel. For n-type 3HJ TFETs [11], atomistic quantum ballistic transport simulations have shown, that extremely high I ON of 800µA/µm (460µA/µm) could be obtained at Lg = 30nm (15nm), V DD = 0.3V, and I OFF = 1nA/µm.…”

Section: Introductionmentioning

confidence: 99%

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A Multiscale Modeling of Triple-Heterojunction Tunneling FETs

Huang

Long

Povolotskyi

et al. 2017

IEEE Trans. Electron Devices

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A high performance triple-heterojunction (3HJ) design has been previously proposed for tunneling FETs (TFETs). Compared with single heterojunction (HJ) TFETs, the 3HJ TFETs have both shorter tunneling distance and two transmission resonances that significantly improve the ON-state current ($I_{\rm{ON}}$). Coherent quantum transport simulation predicts, that $I_{\rm{ON}}=460\rm{\mu A/\mu m}$ can be achieved at gate length $Lg=15\rm{nm}$, supply voltage $V_{\rm{DD}}=0.3\rm{V}$, and OFF-state current $I_{\rm{OFF}}=1\rm{nA/\mu m}$. However, strong electron-phonon and electron-electron scattering in the heavily doped leads implies, that the 3HJ devices operate far from the ideal coherent limit. In this study, such scattering effects are assessed by a newly developed multiscale transport model, which combines the ballistic non-equilibrium Green's function method for the channel and the drift-diffusion scattering method for the leads. Simulation results show that the thermalizing scattering in the leads both degrades the 3HJ TFET's subthreshold swing through scattering induced leakage and reduces the turn-on current through the access resistance. Assuming bulk scattering rates and carrier mobilities, the $I_{\rm{ON}}$ is dropped from $460\rm{\mu A/\mu m}$ down to $254\rm{\mu A/\mu m}$, which is still much larger than the single HJ TFET case

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“…We consider n-type 3HJ TFETs with double-gate UTB structures [11]. The device geometry and the optimized design parameters are shown in Fig.…”

Section: The Triple-heterojunction Designmentioning

confidence: 99%

Section: The Triple-heterojunction Designmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A Multiscale Modeling of Triple-Heterojunction Tunneling FETs

Huang

Long

Povolotskyi

et al. 2017

IEEE Trans. Electron Devices

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“…3 Numerous strategies have been adopted so far in terms of device geometry and materials in order to address the problem in these tunneling transistors. Of them, double gate (DG) TFETs, 4 heterojunction (HJ) TFETs, [5][6][7][8][9][10] cylindrical TFETs, 11 dual metal gate TFETs, 12 Carbon Nanotube (CNT) TFETs, 13 III-V TFETs, 14 and gate engineered TFETs 15 are the most significant.…”

Section: Introductionmentioning

confidence: 99%

A temperature‐dependent surface potential‐based algorithm for extraction of threshold voltage in homojunction TFETs

Goswami

Bhowmick²

2017

Int J Numerical Modelling

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In this paper, we propose an algorithm to extract threshold voltage in homojunction tunnel field effect transistors (TFETs). Single gate TFET and double gate TFET are the geometries which are considered for verification of the method. Firstly, a generalized model of surface potential based on 2D Poisson equation for homojunction TFETs is developed. Secondly, the algorithm involves a number of geometrical operations on surface potential plots, which are performed computationally. From the plots of surface potential and the geometrical constructions, a parameter, range_point, is defined through mathematical formulations. The threshold voltage is determined by subjecting the range_point to a set of constraints which are found to be same for both the devices. The validity of the algorithm is confirmed by considering different parameters like drain voltage, gate oxide thickness, and temperature for both low‐k and high‐k gate dielectric materials in TFETs. The temperature variation is validated for a heterojunction TFET too using the same generalized model of surface potential.

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“…However, under strong confinement, required for good electrostatic control, the effective band gap and transport effective masses both increase, seriously limiting the tunneling probability. Methods to improve InAs/GaSb HJ n-type TFETs (nTFETs) include strain and doping engineering [3], [4], resonant enhancement [5]- [7], and source/channel heterojunctions [8]- [12]. For p-type TFETs (pTFETs), the problem is more severe, as the optimal source doping density is limited by the small conduction band density of states (DOS) [13].…”

Section: Introductionmentioning

confidence: 99%

P-Type Tunnel FETs With Triple Heterojunctions

Huang

Long

Povolotskyi

et al. 2016

IEEE J. Electron Devices Soc.

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A triple-heterojunction (3HJ) design is employed to improve p-type InAs/GaSb heterojunction (HJ) tunnel FETs. The added two HJs (AlInAsSb/InAs in the source and GaSb/AlSb in the channel) significantly shorten the tunnel distance and create two resonant states, greatly improving the ON state tunneling probability. Moreover, the source Fermi degeneracy is reduced by the increased source (AlInAsSb) density of states and the OFF state leakage is reduced by the heavier channel (AlSb) hole effective masses. Quantum ballistic transport simulations show, that with V_{DD} = 0.3V and I_{OFF} = 10^{-3}A/m, I_{ON} of 582A=m (488A=m) is obtained at 30nm (15nm) channel length, which is comparable to n-type 3HJ counterpart and significantly exceeding p-type silicon MOSFET. Simultaneously, the nonlinear turn on and delayed saturation in the output characteristics are also greatly improved

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Extremely high simulated ballistic currents in triple-heterojunction tunnel transistors

Cited by 8 publications

References 2 publications

A Multiscale Modeling of Triple-Heterojunction Tunneling FETs

A Multiscale Modeling of Triple-Heterojunction Tunneling FETs

A temperature‐dependent surface potential‐based algorithm for extraction of threshold voltage in homojunction TFETs

P-Type Tunnel FETs With Triple Heterojunctions

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