External Loopback Testing Experiences with High Speed Serial Interfaces

Meixner, A.; Kakizawa, A.; Provost, B.; Bedwani, S.

doi:10.1109/test.2008.4700557

Cited by 23 publications

(6 citation statements)

References 14 publications

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“…With rising data-rate requirements and ramping up integration density posing new design difficulties at the chip, circuit, and system levels [14], and the resulting gap due to high data rates in the bandwidth of the PEs and peripherals has become a key barrier for the entire system performance [15]. The need for greater bandwidth interfaces in computing systems has resulted in the increased use of high-speed communication interfaces [16]. High-speed interfaces are key components of any electrical design and have become a cornerstone for communication [17].…”

Section: High-speed Interface Overview and Related Workmentioning

confidence: 99%

A Novel Framework for Testing High-Speed Serial Interfaces in Multiprocessor Based Real-Time Embedded System

et al. 2021

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Recent years has seen a tremendous increase in processing requirements of present-day embedded system applications. Embedded systems consist of multiple processing elements (PEs) connected to each other using different types of interfaces. Many complicated tasks are accomplished by embedded systems in varied settings, which may introduce errors during inter-processor communication. Testing such systems is tremendously difficult and challenging from testing non-real time systems. A major part of testing real time embedded systems involves ensuring accuracy and timing in synchronous inter-process communication More specifically, the synchronization and inter-processor communication of real-time applications makes testing a challenging task and due to the demand for higher data rate increases, day-by-day, making testing of such systems even more complex. This paper presents a novel frame work that uses multiple instances of simulators with physical high-speed serial interfaces to emulate any real time embedded system communication. The framework presents a testing technique that detects all faults related to synchronization of high-speed synchronous serial interfaces in a systematic manner. The novelty of our approach is to simulate communication across multiple processors in a simulation environment for detecting and localizing bugs. We verify this framework using a case study consisting of an embedded software defined radio (SDR) system. The test results show the applicability of our approach in fixing bugs that relates to synchronization issues that otherwise are very hard to find and fix in very complicated systems, such as SDR.

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Section: High-speed Interface Overview and Related Workmentioning

confidence: 99%

A Novel Framework for Testing High-Speed Serial Interfaces in Multiprocessor Based Real-Time Embedded System

et al. 2021

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“…Drive to higher bandwidth interfaces in computing devices has resulted in a major adoption of the serial communication interfaces [136]. That also has been reflected in FPGAs' research.…”

Section: Serialmentioning

confidence: 99%

Field Programmable Gate Array Applications—A Scientometric Review

2019

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Field Programmable Gate Array (FPGA) is a general purpose programmable logic device that can be configured by a customer after manufacturing to perform from a simple logic gate operations to complex systems on chip or even artificial intelligence systems. Scientific publications related to FPGA started in 1992 and, up to now, we found more than 70,000 documents in the two leading scientific databases (Scopus and Clarivative Web of Science). These publications show the vast range of applications based on FPGAs, from the new mechanism that enables the magnetic suspension system for the kilogram redefinition, to the Mars rovers’ navigation systems. This paper reviews the top FPGAs’ applications by a scientometric analysis in ScientoPy, covering publications related to FPGAs from 1992 to 2018. Here we found the top 150 applications that we divided into the following categories: digital control, communication interfaces, networking, computer security, cryptography techniques, machine learning, digital signal processing, image and video processing, big data, computer algorithms and other applications. Also, we present an evolution and trend analysis of the related applications.

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“…Moreover, the resulting gap in the bandwidth of the interface among the memory and processors has become a critical hurdle for total system performance as the data rate demands have increased [19]. The demand for increased bandwidth interfaces in computing devices has led to the adoption of high-speed interfaces identical to those used in communication devices [20]. In today's computing industry, featuring communication systems as well as data centers [21], high-speed serial interfaces (HSSI) are prevalent [22].…”

Section: Introductionmentioning

confidence: 99%

A Knowledge Base Technique for Detecting Multiple High-Speed Serial Interface Synchronization Errors in Multiprocessor-Based Real-Time Embedded Systems

et al. 2022

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The heterogeneity of the multiple processing elements (PEs) is a feature of real-time embedded systems. General-purpose processors and several embedded processors, as well as dedicated high-speed interfaces, are among these elements. Communication between the processors is among the most significant characteristics of developing such complex systems. Furthermore, synchronization is a common issue during interprocessor communication in embedded systems. Debugging and testing such systems is time-consuming, difficult, and laborious, with the majority of the complexities centered on debugging real-time interprocessor communication, such as synchronization in terms of timing and accuracy. While the hardware design features of heterogeneous multiprocessor real-time embedded systems have received a lot of attention, the design and development of software-based solutions still have the potential to be addressed. In particular, software-based testing becomes challenging due to interprocessor communication and the synchronization of real-time applications. A knowledge-based technique that aids in testing high-speed serial interfaces in multiprocessor-based real-time embedded systems is proposed that needs debugging in real time while an application is running. It is becoming much more important to test and validate these interfaces in real time as the demand for high data transmission rates increases. The presented work uses a technique to simulate, create and enhance the knowledge base used as correlation-based error detection that reduces the development time. The proposed technique helps in detecting synchronization-related errors that occur during communication among multiple high-speed serial interfaces. The presented work also lists a series of experiments to validate the effectiveness of the proposed technique. The results show that the presented techniques are effective for error identification in real-time embedded systems.

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External Loopback Testing Experiences with High Speed Serial Interfaces

Cited by 23 publications

References 14 publications

A Novel Framework for Testing High-Speed Serial Interfaces in Multiprocessor Based Real-Time Embedded System

A Novel Framework for Testing High-Speed Serial Interfaces in Multiprocessor Based Real-Time Embedded System

Field Programmable Gate Array Applications—A Scientometric Review

A Knowledge Base Technique for Detecting Multiple High-Speed Serial Interface Synchronization Errors in Multiprocessor-Based Real-Time Embedded Systems

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