Extending OpenMP SIMD Support for Target Specific Code and Application to ARM SVE

Lee, Jinpil; Petrogalli, Francesco; Hunter, G. L. K.; Sato, Mitsuhisa

doi:10.1007/978-3-319-65578-9_5

Cited by 9 publications

(3 citation statements)

References 4 publications

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“…From version 4.0 onwards, OpenMP provides the directive declare simd. A user can decorate a function with this directive to inform the compiler that the function can be safely invoked concurrently on multiple instances of its arguments [36]. This means that the compiler can vectorize the function safely.…”

Section: Vector Function Application Binary Interfacementioning

confidence: 99%

SLEEF: A Portable Vectorized Library of C Standard Mathematical Functions

Shibata

Petrogalli

2020

IEEE Trans. Parallel Distrib. Syst.

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In this paper, we present techniques used to implement our portable vectorized library of C standard mathematical functions written entirely in C language. In order to make the library portable while maintaining good performance, intrinsic functions of vector extensions are abstracted by inline functions or preprocessor macros. We implemented the functions so that they can use sub-features of vector extensions such as fused multiply-add, mask registers and extraction of mantissa. In order to make computation with SIMD instructions efficient, the library only uses a small number of conditional branches, and all the computation paths are vectorized. We devised a variation of the Payne-Hanek argument reduction for trigonometric functions and a floating point remainder, both of which are suitable for vector computation. We compare the performance of our library to Intel SVML. Index Terms-Parallel and vector implementations, SIMD processors, elementary functions, floating-point arithmetic ✦ 1. https://unity3d.com/.

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Section: Vector Function Application Binary Interfacementioning

confidence: 99%

SLEEF: A Portable Vectorized Library of C Standard Mathematical Functions

Shibata

Petrogalli

2020

IEEE Trans. Parallel Distrib. Syst.

Self Cite

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“…However, given the observed AVX speedups, backends for any 128-bit/4-element vector architecture such as NEON (ARM), VSX (POWER) or QPX (BlueGene) promise little pay-off. On the other hand, the upcoming ARM SVE extension might be a worthwhile target as it is 2048-bits wide [24]. A GPU version, replacing mask checks by the aforementioned CUDA intrinsics, might also lead to sizeable speedups, but would require considerable changes w.r.t.…”

Section: 3mentioning

confidence: 99%

Accelerating AIREBO: Navigating the Journey from Legacy to High‐Performance Code

Höhnerbach

Bientinesi

2019

J Comput Chem

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Despite initiatives to improve the quality of scientific software, there still is a large presence of legacy code. The focus of such code is usually on domain-science features, rather than maintainability or highest performance. Additionally, architecture specific optimizations often result in less maintainable code. In this article, we focus on the AIREBO potential from LAMMPS, which exhibits large and complex computational kernels, hindering any systematic optimization. We suggest an approach based on complexity-reducing refactoring and hardware abstraction and present the journey from the C++ port of a previous Fortran code to performance-portable, KNC-hybrid, vectorized, scalable, and optimized code supporting full and reduced precision. The journey includes extensive testing that fixed bugs in the original code. Large-scale, full-precision runs sustain speedups of more than 4× (KNL) and 3× (Skylake).

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“…In the past few decades, in the field of automatic vectorization, many fundamental problems have been solved and many optimization methods have been proposed [7][8][9][10][11], which are adopted by mainstream compilers. In recent years, with the emergence of new SIMD instruction sets (AVX512 [12], SVE [13], and RISC-V vector instruction set [14]), SIMD technology is developing continuously and is becoming more and more powerful. From basic vector instructions to mask and variable-length vector instructions [15], the parallel length of SIMD instructions is also getting longer and longer.…”

Section: Introductionmentioning

confidence: 99%

An SLP Vectorization Method Based on Equivalent Extended Transformation

Feng

Tao

et al. 2022

Wireless Communications and Mobile Computing

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SIMD extensions provide an efficient energy consumption platform to support mobile systems. How to use SIMD instructions to improve program performance is a challenge. SLP (superword level parallelism) is an efficient solution to exploit the parallelism, oriented to SIMD, between statements in the basic blocks, and it has been widely used in almost all the mainstream compilers. SLP relies on finding isomorphic statements to pack together into vectors. However, the capability of autovectorization for nonisomorphic statements is insufficient. In this paper, we introduce SLP-E, a novel autovectorization method that can automatically vectorize the codes which contain nonisomorphic statements, translate the nonisomorphic statements into the isomorphic statements by equivalent extended transformation of expressions, and vectorize the isomorphic statements. SLP-E improves the application scope and benefits of SLP. We implement the SLP-E in LLVM and compare it with prior approaches. A set of applications that benefit from autovectorization are taken from the SPEC CPU 2017 benchmark to compare our approach and prior techniques. Experimental results show that SLP-E achieves more than 43.9% speedup, on average, over other similar methods.

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Extending OpenMP SIMD Support for Target Specific Code and Application to ARM SVE

Cited by 9 publications

References 4 publications

SLEEF: A Portable Vectorized Library of C Standard Mathematical Functions

SLEEF: A Portable Vectorized Library of C Standard Mathematical Functions

Accelerating AIREBO: Navigating the Journey from Legacy to High‐Performance Code

An SLP Vectorization Method Based on Equivalent Extended Transformation

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