Exploring storage organization in ASIP synthesis

Jain, Manoj; Balakrishnan, M.; Kumar, Anshul

doi:10.1109/dsd.2003.1231909

Cited by 3 publications

(5 citation statements)

References 18 publications

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“…The second approach for exploration of DSE is Scheduler based approach. Where most of the researcher worked on the simulator based approach but few worked on scheduler based approach as Gupta, Balakrishnan et al [15] and MK Jain, Kumar Anshul, Balakrishnan et al [3,4,5,6,7] are the main contributors of the scheduler based approach.…”

Section: Scheduler Based Approach For Design Space Explorationmentioning

confidence: 99%

“…For e.g. MK Jain et al [3,4,5,6,7] explores the Design Space Exploration (DSE) on register file size, register window and on-chip data cache. There are very less work carried out on the parameters like Storage Exploration, Pipeline Structure, and Bus Architecture which was extensively explored by simulator based approach.…”

Section: Scheduler Based Approach For Design Space Explorationmentioning

confidence: 99%

“…MK Jain, Anshul Kumar, Balakrishnan et al [3,4,5,6,7] explores the register file size but took only the simple plain register file size i.e. GPR (General Purpose Register) and didn't consider the related parameters as FPR, BR, CR and PR in his study of DSE.…”

Section: Scheduler Based Approach For Design Space Explorationmentioning

confidence: 99%

“…ASIP fits in between these two and provides flexibility at lower cost than general programmable processors. According to MK Jain et al [3,4,5,6,7] design of ASIP can be typically divided in five steps as mentioned below:…”

mentioning

confidence: 99%

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Comparison between the Simulator and Scheduler based approach of Design Space Exploration for Application Specific Instruction set Processor

Jain¹,

Gour²

2012

IJCA

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An Application Specific Instruction set Processor (ASIP) is a processor designed for a particular application or for a set of applications. An ASIP exploits special characteristics of application(s) to meet the desired performance, cost and power requirements. ASIP Design Space Exploration can be carried out by one of the two popular available techniques as Simulator or Scheduler based approach. This paper is an attempt to survey and compare both the mentioned techniques of design space exploration of ASIP. A list of explored design space parameters using simulator based approach is included in this paper. This paper also highlights few potential parameters which can be explored using the scheduler based approach.

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Section: Scheduler Based Approach For Design Space Explorationmentioning

confidence: 99%

Section: Scheduler Based Approach For Design Space Explorationmentioning

confidence: 99%

Section: Scheduler Based Approach For Design Space Explorationmentioning

confidence: 99%

mentioning

confidence: 99%

See 2 more Smart Citations

Comparison between the Simulator and Scheduler based approach of Design Space Exploration for Application Specific Instruction set Processor

Jain¹,

Gour²

2012

IJCA

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“…Such an approach is shown in Figure 4. Examples of such approaches are [16][17][18][19]. Since this technique is a bit newer and very few details of architectures are included is the model.…”

Section: Fig 3: Simulator Based Performance Estimatormentioning

confidence: 99%

ADA: Applications Define ASIP

Jain¹

2014

IJCA

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Interest in Application Specific Instruction set Processors or ASIPs has increased significantly. Sincere efforts have been put in improving ASIP design methodologies in industry as well as in academia. By the close observation and analysis of these approaches, it was found that though the existing approaches are focusing on making the process automatic and providing better GUI to help the designers, core technique used in deciding the suitable architecture (processor and memory) is based on design space exploration. This exploration is done with the help of estimators. Such estimators are either simulator based or scheduler based. This study identifies that both types of techniques are very far from the ideal dream technique in which applications should have defined the suitable architecture configuration and these techniques are becoming unsuitable in current scenario. Each problem has a solution hidden in it. This scenario motivated us to propose a novel and revolutionary ASIP design technique making the dream true. The Proposed technique does not focuses on design space exploration, it focuses on directly defining processors for given applications rather than searching for suitable configuration in a jungle of configurations can be suggested by the architecture design space. General TermsComputer Architecture, Processor Design, Processor Design Technology.

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