Exploiting Parallelism with Dependence-Aware Scheduling

Zhuang, Xin; Eichenberger, Alexandre E.; Luo, Yangchun; O’Brien, Kevin; O’Brien, Kathryn

doi:10.1109/pact.2009.10

Cited by 23 publications

(12 citation statements)

References 17 publications

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“…For loops not amenable to static analysis, speculative techniques have been used for run-time parallelization [23], [33], [37], [46]. Zhuang et al [47] inspect run-time dependences to check if contiguous sets of loop iterations are dependent. None of those efforts address distributed memory code generation.…”

Section: Related Workmentioning

confidence: 99%

Code generation for parallel execution of a class of irregular loops on distributed memory systems

Ravishankar¹,

Eisenlohr²,

Pouchet³

et al. 2012

2012 International Conference for High Performance Computing, Networking, Storage and Analysis

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Abstract-Parallelization and locality optimization of affine loop nests has been successfully addressed for shared-memory machines. However, many large-scale simulation applications must be executed in a distributed-memory environment, and use irregular/sparse computations where the control-flow and arrayaccess patterns are data-dependent.In this paper, we propose an approach for effective parallel execution of a class of irregular loop computations in a distributedmemory environment, using a combination of static and runtime analysis. We discuss algorithms that analyze sequential code to generate an inspector and an executor. The inspector captures the data-dependent behavior of the computation in parallel and without requiring complete replication of any of the data structures used in the original computation. The executor performs the computation in parallel. The effectiveness of the framework is demonstrated on several benchmarks and a climate modeling application.

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Section: Related Workmentioning

confidence: 99%

Code generation for parallel execution of a class of irregular loops on distributed memory systems

Ravishankar¹,

Eisenlohr²,

Pouchet³

et al. 2012

2012 International Conference for High Performance Computing, Networking, Storage and Analysis

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“…Dynamic schemes to execute loop iterations in parallel when they are detected at run time to be independent have been proposed [16,42]. In [16] loop iterations are speculatively executed in parallel with the possibility of fixing the execution if they are misspeculated.…”

Section: Related Workmentioning

confidence: 99%

“…In [16] loop iterations are speculatively executed in parallel with the possibility of fixing the execution if they are misspeculated. In [42], loop iterations are executed in parallel after they are recognized to be independent at run time; in this work the focus is on minimizing the overhead due to the computation of the dynamic data dependences by performing an approximated and conservative analysis while the original code is in execution.…”

Section: Related Workmentioning

confidence: 99%

Helix

Campanoni

Jones

Holloway

et al. 2012

Proceedings of the Tenth International Symposium on Code Generation and Optimization

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We describe and evaluate HELIX, a new technique for automatic loop parallelization that assigns successive iterations of a loop to separate threads. We show that the inter-thread communication costs forced by loop-carried data dependences can be mitigated by code optimization, by using an effective heuristic for selecting loops to parallelize, and by using helper threads to prefetch synchronization signals. We have implemented HELIX as part of an optimizing compiler framework that automatically selects and parallelizes loops from general sequential programs. The framework uses an analytical model of loop speedups, combined with profile data, to choose loops to parallelize. On a six-core Intel R ✌ Core ❚ ▼ i7-980X, HELIX achieves speedups averaging 2.25✂, with a maximum of 4.12✂, for thirteen C benchmarks from SPEC CPU2000.

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“…The other main direction of approaching autoparallelization has been to analyze memory references at run-time, either via inspector/executor [26], or via TLS techniques [25], or via faster but less scalable techniques [30]. These techniques have overhead proportional to the number of the original-loop accesses, and hence we use then only as last resort, once all the lighter predicates failed.…”

Section: Related Workmentioning

confidence: 99%

Logical inference techniques for loop parallelization

Oancea

Rauchwerger

2012

Proceedings of the 33rd ACM SIGPLAN Conference on Programming Language Design and Implementation

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This paper presents a fully automatic approach to loop parallelization that integrates the use of static and run-time analysis and thus overcomes many known difficulties such as nonlinear and indirect array indexing and complex control flow. Our hybrid analysis framework validates the parallelization transformation by verifying the independence of the loop's memory references. To this end it represents array references using the USR (uniform set representation) language and expresses the independence condition as an equation, S = ∅, where S is a set expression representing array indexes. Using a language instead of an array-abstraction representation for S results in a smaller number of conservative approximations but exhibits a potentially-high runtime cost. To alleviate this cost we introduce a language translation F from the USR set-expression language to an equally rich language of predicates (F(S) ⇒ S = ∅). Loop parallelization is then validated using a novel logic inference algorithm that factorizes the obtained complex predicates (F (S)) into a sequence of sufficient-independence conditions that are evaluated first statically and, when needed, dynamically, in increasing order of their estimated complexities. We evaluate our automated solution on 26 benchmarks from PERFECT-CLUB and SPEC suites and show that our approach is effective in parallelizing large, complex loops and obtains much better full program speedups than the Intel and IBM Fortran compilers.

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Exploiting Parallelism with Dependence-Aware Scheduling

Cited by 23 publications

References 17 publications

Code generation for parallel execution of a class of irregular loops on distributed memory systems

Code generation for parallel execution of a class of irregular loops on distributed memory systems

Helix

Logical inference techniques for loop parallelization

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