2016 IEEE 10th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip (MCSOC) 2016
DOI: 10.1109/mcsoc.2016.44
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Exploiting Large Memory Using 32-Bit Energy-Efficient Manycore Architectures

Abstract: Recent advances in processor manufacturing has led to integrating tens of cores in a single chip and promise to integrate many more with the so-called manycore architectures. Manycore architectures usually integrate many small power efficient cores, which can be 32-bit cores in order to maximize the performance per Watt ratio. Providing large physical memory (e.g. 1 TB) to such architectures thus requires extending the physical address space (e.g. to 40 bits). This extended physical space has early been identi… Show more

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