Exploiting FPGA Block Memories for Protected Cryptographic Implementations

Abstract

Modern field programmable gate arrays (FPGAs) are power packed with features to facilitate designers. Availability of features like large block memory (BRAM), digital signal processing cores, and embedded CPU makes the design strategy of FPGAs quite different from ASICs. FPGAs are also widely used in security-critical applications where protection against known attacks is of prime importance. We focus on physical attacks that target physical implementations. To design countermeasures against such attacks, the strategy for FPGA designers should be different from that in ASIC. The available features should be exploited to design compact and strong countermeasures. In this article, we propose methods to exploit the BRAMs in FPGAs for designing compact countermeasures. Internal BRAM can be used to optimize intrinsic countermeasures such as masking and dual-rail logics, which otherwise have significant overhead (at least 2×) compared to unprotected ones. The optimizations are applied on a real AES-128 co-processor and tested for area overhead and resistance on Xilinx Virtex-5 chips. The presented masking countermeasure has an overhead of only 16% when applied on AES. Moreover, the dual-rail precharge logic (DPL) countermeasure has been optimized to pack the whole sequential part in the BRAM, hence enhancing the security. Proper robustness evaluations are conducted to analyze the optimization in terms of area and security.

The Conflicted Usage of RLUTs for Security-Critical Applications on FPGA

“…Using RLUT, the Sboxes can be easily computed as a function of the tweak and stored on the fly. Similarly, a low-cost masking scheme RSM [4] can also benefit from RLUT to achieve desired rotation albeit at the cost of latency. Thus there exist several applications where customizable Sboxes are needed.…”

“…In [3], authors show several side-channel countermeasures which could be realized on FPGAs to protect one design. Another work [4] demonstrates the efficient use of block RAMs to implement complex countermeasures like masking and dual-rail logic. DSPs in FPGAs have also been widely used to design public-key cryptographic algorithms like ECC [5,6] and other post-quantum algorithms [7].…”

Sophisticated security verification on routing repaired balanced cell‐based dual‐rail logic against side channel analysis

“…It is because of the global synchronisation signal that the memory utilisation is increased by 2" + 2 and not 2 2 ". The cost can be further reduced to 2" + by using certain BRAM features [29].…”

Encoding the state of integrated circuits

“…By using a LCD code with dual distance d, encoded circuit can be protected against monovariate SCA of orders 1, 2, to d − 1. And the monovariate SCA of order d is the lowest degree attack to be practical [19].…”