2011
DOI: 10.1109/tns.2011.2107528
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Experimental Demonstration of Pattern Influence on DRAM SEU and SEFI Radiation Sensitivities

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Cited by 9 publications
(3 citation statements)
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“…The SEU mainly occurs by a charge collection within the memory binary cell caused by a particle strike occurring in, or close to, the storage capacitor or the access transistor [22], [23]. The cell upsets occur through a charge collection by the bias junction of a cell-access transistor, increasing the charge on the storage capacitor, and by charge transfer due to a low-resistive path created by an ionizing particle, which moves electrons from a low-voltage node to a high-voltage node [24]. Also, upsets can be caused by a charge collection in the pre-charged bit line during a memory access, introducing an imbalance in the sensing signal during or before the sensing operation [22].…”
Section: Radiation-induced Effects On Memoriesmentioning
confidence: 99%
“…The SEU mainly occurs by a charge collection within the memory binary cell caused by a particle strike occurring in, or close to, the storage capacitor or the access transistor [22], [23]. The cell upsets occur through a charge collection by the bias junction of a cell-access transistor, increasing the charge on the storage capacitor, and by charge transfer due to a low-resistive path created by an ionizing particle, which moves electrons from a low-voltage node to a high-voltage node [24]. Also, upsets can be caused by a charge collection in the pre-charged bit line during a memory access, introducing an imbalance in the sensing signal during or before the sensing operation [22].…”
Section: Radiation-induced Effects On Memoriesmentioning
confidence: 99%
“…Control logic is one of the most important parts of the memory, with the role to manage several signals and decode instructions coming from the processor. The particle hitting the control logic can cause SEU/MBU that results in clear content in the affected memory bank [19]. This effect may be extremely critical.…”
Section: Clear Content In the Memorymentioning
confidence: 99%
“…Examples of logic SEFIs are "fuse latch upsets" also called SEFLUs (Bougerol et al 2010(Bougerol et al , 2011) that lead to the wrong addressing of a whole row/column. Manufacturers are experiencing an increasing number of defective cells, therefore adding spare cells and exposing them to reliability tests.…”
Section: Single Event Functional Interrupt (Sefi)mentioning
confidence: 99%