Experimental and Theoretical Studies of Avalanche Transistors

The different instabilities exhibited by power BJT's during inductive turn-off are classified and then studied theoretically by means of 2-D simulator in which the device is simulated within a realistic external circuit, and experimentally by means of a non destructive method. It is shown that many instabilities originate by an interaction between electric field and charge within a single cell, which causes transit time osdllation phenomena. The role ofthestray capacitance ofthecircuit in favouring these instabillties is described. Other kinds of instability cannot be understood by studying a single cell but rather require to account for the interactions between cells.An 'InstabU&v Map" is h a l l y used as a synthetic picture of the device behaviour which ensures an easy way for Linking device behaviour to its physical features.

show abstract

Experimental and Theoretical Studies of Avalanche Transistors

Cited by 4 publications

References 12 publications

Amplification with 3-terminal avalanche devices

Amplification with 3-terminal avalanche devices

Reverse bias instabilities in bipolar power transistors with cellular layout

Instabilities in modern bipolar transistors during the turn-off under inductive loads

Contact Info

Product

Resources

About