Experimental and Theoretical Investigations on Short-Channel Effects in 4H-SiC MOSFETs

Noborio, Masato; Kanzaki, Y.; Suda, Jun; Kimoto, Tsunenobu

doi:10.1109/ted.2005.854269

Cited by 45 publications

(29 citation statements)

References 29 publications

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“…The typical channel length ( Ch L ) and width (W) were µm and 200 µm, respectively. Longchannel MISFETs were employed in order to suppress short-channel effects [53] and to estimate accurate channel mobilities.…”

Section: Device Fabrication 31 Fabrication Process Of Mis Capacitorsmentioning

confidence: 99%

4H‐SiC MISFETs with nitrogen‐containing insulators

Noborio

Suda

Beljakowa

et al. 2009

Physica Status Solidi (a)

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4H‐SiC MISFETs with nitrogen‐containing insulators have been fabricated and characterized. Several techniques have been explored to incorporate nitrogen in the gate insulator in order to improve the density of interface states and thereby the channel mobility. The techniques are N2O‐grown oxides, the oxidation of a surface layer co‐implanted with N+ and Al+, deposited SiO2 annealed in N2O and NO, and deposited SiNx /SiO2 annealed in N2O. By optimizing the formation process of the gate insulators, MIS capacitors with N‐containing insulators have demonstrated an interface state density close to the conduction band edge below 2 × 1011 cm–2 eV–1 which is one or two orders‐of‐magni‐ tude lower than that of MOS capacitors with oxides grown in dry O2. The channel mobility of the n‐channel 4H‐SiC(0001) MISFETs with N‐containing insulators is increased to about 30 cm2/Vs. In addition, an even higher channel mobility of 50 cm2/Vs has been realized by utiliz‐ ing N‐containing insulators adequately processed on the 4H‐SiC (000$ \bar 1 $) face. From the experimental results, the dominant scattering mechanisms in SiC MISFETs have been identified; Coulomb scattering and electron trapping at interface states dominate the channel mobility in SiC MOSFETs with thermally‐grown and deposited SiO2. The application of N‐containing insulators to p‐channel 4H‐SiC MIS devices is also discussed. (© 2009 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

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Section: Device Fabrication 31 Fabrication Process Of Mis Capacitorsmentioning

confidence: 99%

4H‐SiC MISFETs with nitrogen‐containing insulators

Noborio

Suda

Beljakowa

et al. 2009

Physica Status Solidi (a)

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“…The C GS of the Si DMOSFET becomes abruptly large and saturates with increasing V GS , but the C GS of the SiC DiMOSFET becomes gradually large and hardly saturates with increasing V GS . This nonsaturable characteristics stem from the short channel effects [8]. The channel length of the SiC DiMOSFET is approximately equal to 0.75 μm.…”

Section: Results and Discussion Of C-v Characteristicsmentioning

confidence: 99%

Characterization of the gate-voltage dependency of input capacitance in a SiC MOSFET

Phankong

Funaki

Hikihara

2010

IEICE Electron. Express

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Abstract:The charge/discharge phenomenon of capacitance between terminals in a power MOSFET affects on its switching behavior of the device. The input capacitance is composed of the gate-source capacitance C GS and the gate-drain capacitance C GD , which vary with gate voltage V GS . This paper characterizes the relationship between the input capacitance of a SiC MOSFET and the gate voltage with considering the internal device structure. The results give us a clue to understand the switching dynamics of the power MOSFET.

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“…In this section, we discuss the importance of the PS region to the short-circuit Energies 2020, 13, 1122 8 of 10 capability of 4H-SiC UMOSFETs. A common approach to reduce channel resistance in 4H-SiC MOSFETs is to use submicron channel length, where short channel effects are inevitable [19,20]. In Figure 9, simulated Id-Vds curves in the saturation region of SG/CSL and SG/CSL/PS are compared.…”

Section: Short-circuit Capabilitymentioning

confidence: 99%

Numerical Study of 4H-SiC UMOSFETs with Split-Gate and P+ Shielding

Jiang

Zhao

et al. 2020

Energies

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In this paper, performances of a 4H-SiC UMOSFET with split gate and P+ shielding in different configurations are simulated and compared, with an emphasis on the switching characteristics and short circuit capability. A novel structure with the split gate in touch with the P+ shielding is proposed. The key design issues for 4H-SiC UMOSFETs are trench gate dielectric protection and reverse transfer capacitance Crss reduction. Based on simulation results, it is concluded that a UMOSFET with a gate structure combining split gate grounded to the trench bottom protection P+ shielding layer and a current spreading layer is achieved to yield the best compromise between conduction, switching, and short circuit performance. The split-gate design can effectively reduce Crss by shielding the coupling between the gate electrode and the drain region. The P+ shielding design not only protects the oxide at trench bottom corners but also minimizes the short channel effect due to drain-induced barrier lowing and the channel length modulation. Trade-off of the doping concentration of current spreading layer for UMOSFET is also discussed. A heavily doped current spreading layer may increase Crss and influence the switching time, even though RON,SP is reduced.

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Experimental and Theoretical Investigations on Short-Channel Effects in 4H-SiC MOSFETs

Cited by 45 publications

References 29 publications

4H‐SiC MISFETs with nitrogen‐containing insulators

4H‐SiC MISFETs with nitrogen‐containing insulators

Characterization of the gate-voltage dependency of input capacitance in a SiC MOSFET

Numerical Study of 4H-SiC UMOSFETs with Split-Gate and P+ Shielding

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