Experiences from System-on-Chip design courses

Abstract

This paper presents our experiences in teaching System-on-Chip design at Tampere University of Technology. We concentrate on teaching practices and the exercise work which teaches intellectual property (IP) reuse, platform-based design, and HW/SW co-design. Students implement a video encoder on FPGA. It has proved good that teachers split the large exercise into mandatory weekly tasks and bonus points are awarded for good work. Automated testbenches and startup examples were very useful. Students consider the course motivating, even if they underestimate the required time and effort. In the future, more effort is needed in finalizing the reusable IP blocks and whole project works for easier reuse as well as setting up a common repository.

Educating hardware design — From boolean equations to massively parallel computing systems

“…A selection of projects is presented and improvements are presented. Also Matilainen et al introduces in [8] their experiences from their system on chip design courses.…”