Exact sparse matrix-vector multiplication on GPU's and multicore architectures

Boyer, Brice; Dumas, J.; Giorgi, Pascal

doi:10.1145/1837210.1837224

Cited by 16 publications

(18 citation statements)

References 22 publications

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“…Thus, one can avoid superfluous multiplication within SpMV and further reduce the memory footprint of the matrix. This approach have been developed in [3] using a splitting of the matrix A in 3 matrices: A 1 storing only 1's , A −1 storing −1's and finally, A λ store the rest of the entries. SpMV is then computed independently for each matrices and the results are sum up, i.e.…”

Section: Hybridmentioning

confidence: 99%

“…We used g++ 4.8.2 and an Intel bi-Xeon E5-2620, 16GB of RAM for our benchmarks. We performed a comparison with the best SpMV available at this time in the LinBox library 1 (rev 4901) based on the work of [3].…”

Section: Benchmarksmentioning

confidence: 99%

“…The implementation of the hybrid format from [3] is not yet fully operational in LinBox and we did not get the chance yet to compare to it. However, following the speed-up of the hybrid format vs the CRS one given in [3, Figure 3], which is less than 1.5, we are confident in the performance of our optimized SpMV.…”

Section: Prime Field F P With Small Pmentioning

confidence: 99%

“…Our main concern is weather the numerical formats are still satisfying when computing over finite fields and which arithmetic strategy is the most suited to the particularity of SpMV. This question has been already addressed in many papers, as in [3,6], but no general optimization approach has been designed. In this paper, we propose a general framework which incorporates most of the optimization techniques for SpMV over finite field.…”

Section: Introductionmentioning

confidence: 99%

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Generating Optimized Sparse Matrix Vector Product over Finite Fields

Giorgi

Vialla

2014

Mathematical Software – ICMS 2014

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Abstract. Sparse Matrix Vector multiplication (SpMV) is one of the most important operation for exact sparse linear algebra. A lot of research has been done by the numerical community to provide efficient sparse matrix formats. However, when computing over finite fields, one need to deal with multi-precision values and more complex operations. In order to provide highly efficient SpMV kernel over finite field, we propose a code generation tool that uses heuristics to automatically choose the underlying matrix representation and the corresponding arithmetic.

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Section: Hybridmentioning

confidence: 99%

Section: Benchmarksmentioning

confidence: 99%

Section: Prime Field F P With Small Pmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Generating Optimized Sparse Matrix Vector Product over Finite Fields

Giorgi

Vialla

2014

Mathematical Software – ICMS 2014

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“…See for instance the research areas in the website of GPGPU.org [2] or the application section in the Wikipedia page for GPGPU [1], where many references and links are provided. Symbolic computation is also entering the area of many-core computing, but few reports have been published so far [4,8,10,17].…”

Section: Introductionmentioning

confidence: 99%

Solving bivariate polynomial systems on a GPU

Maza

Pan²

2011

ACM Commun. Comput. Algebra

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Abstract. We present a CUDA implementation of dense multivariate polynomial arithmetic based on Fast Fourier Transforms over finite fields. Our core routine computes on the device (GPU) the subresultant chain of two polynomials with respect to a given variable. This subresultant chain is encoded by values on a FFT grid and is manipulated from the host (CPU) in higher-level procedures.We have realized a bivariate polynomial system solver supported by our GPU code. Our experimental results (including detailed profiling information and benchmarks against a serial polynomial system solver implementing the same algorithm) demonstrate that our strategy is well suited for GPU implementation and provides large speedup factors with respect to pure CPU code.

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Iterative sparse matrix–vector multiplication for accelerating the block Wiedemann algorithm over GF(2) on multi‐graphics processing unit systems

Schmidt

Aribowo

Dang

2012

Concurrency and Computation

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The block Wiedemann (BW) algorithm is frequently used to solve sparse linear systems over GF(2). Iterative sparse matrix-vector multiplication is the most time-consuming operation. The necessity to accelerate this step is motivated by the application of BW to very large matrices used in the linear algebra step of the number field sieve (NFS) for integer factorization. In this paper, we derive an efficient CUDA implementation of this operation by using a newly designed hybrid sparse matrix format. This leads to speedups between 4 and 8 on a single graphics processing unit (GPU) for a number of tested NFS matrices compared with an optimized multicore implementation. We further present a GPU cluster implementation of the full BW for NFS matrices. A small-sized GPU cluster is able to outperform CPU clusters of larger size for large matrices such as the one obtained from the Kilobit special NFS factorization. ITERATIVE SPARSE MATRIX-VECTOR MULTIPLICATION 587 for example, a GeForce GTX580 (NVIDIA Corp.) has 192.4-GB/s memory bandwidth, whereas an Intel Core-i7 (Intel Corp., Santa Clara, CA, USA) has a maximum of 25.6-GB/s memory bandwidth.Sparse matrix-vector multiplication on the GPU has been explored previously in several papers [11][12][13][14] for matrices derived from scientific computing applications. However, sparse matrices derived from NFS have, generally, different properties, that is, they are larger, have a few dense rows, and have many extremely sparse rows. The large size of the matrix causes the BL and BW algorithms to require a large number of SpMV iterations. This means that the time spent for matrix preprocessing and matrix data transfer to the GPU memory are negligible compared with the total runtime. Thus, approaches to SpMV on GPUs for NFS matrices may be different from previously published GPU SpMV approaches.One limitation of using a GPU is that memory size of one device is fixed; in other words, we cannot install more RAM on a GPU like on a CPU workstation. For example, a Fermi Tesla C2070 has only 6-GB RAM. Sending the matrix back and forth from CPU memory to GPU memory are very costly operations, thus forcing us to use multiple GPUs to solve large matrices. The challenge of multi-GPU SpMV is to coordinate the communication between GPUs and between GPUs and CPUs efficiently while maintaining good performance. We address this challenge by presenting a multi-GPU SpMV implementation that achieves considerable speedup over traditional CPU cluster and grid implementations. This paper extends our conference paper [15] by presenting a GPU cluster parallelization and more in-depth experimental results.This paper is organized as follows. Section 2 introduces some background about the BW algorithm. Section 3 describes several published sparse matrix formats and their GPU performance when applied to NFS matrices. Section 4 presents our new formats specifically designed for NFS matrices and their CUDA implementation for the Fermi GPU architecture. The performance of our format on single GPU and dual GPU ar...

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Exact sparse matrix-vector multiplication on GPU's and multicore architectures

Cited by 16 publications

References 22 publications

Generating Optimized Sparse Matrix Vector Product over Finite Fields

Generating Optimized Sparse Matrix Vector Product over Finite Fields

Solving bivariate polynomial systems on a GPU

Iterative sparse matrix–vector multiplication for accelerating the block Wiedemann algorithm over GF(2) on multi‐graphics processing unit systems

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