Event history based sparse state saving in time warp

Quaglia, Francesco

doi:10.1145/278009.278018

Cited by 6 publications

(7 citation statements)

References 27 publications

(30 reference statements)

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“…In this sense, our proposal is perfectly compatible with all previous literature results based on the usage of checkpointing intervals (rather than checkpointing at each event). Indeed, it is possible to rely on sparse state saving (Lin and Lazowska 1990;Bellenot 1992), or on any form of adaptive state saving (Palaniswamy and Wilsey 1993;Rönngren and Ayani 1994;Fleischmann and Wilsey 1995;Skold and Rönngren 1996;Quaglia 1998;Quaglia 2001).…”

Section: Managing Incremental Checkpointsmentioning

confidence: 99%

Hardware-Assisted Incremental Checkpointing in Speculative Parallel Discrete Event Simulation

Stefano

Ferracci

Santis

et al. 2019

2019 Winter Simulation Conference (WSC)

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Nowadays hardware platforms offer a plethora of innovative facities for profiling the execution of programs. Most of them have been exploited as tools for program characterization, thus being used as kind of programexternal observers. In this article we take the opposite perspective where hardware profiling facilities are exploited to execute core functional tasks for the correct and efficient execution of speculative Parallel Discrete Event Simulation (PDES) applications. In more detail we exploit them-specifically, the ones offered by Intel x86-64 processors-to build a hardware-supported incremental checkpointing solution that enables the reduction of the event-execution cost in speculative PDES compared to the software-based counterpart. We integrated our solution in the open source ROOT-Sim runtime environment, thus making it available for exploitation.

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Section: Managing Incremental Checkpointsmentioning

confidence: 99%

Hardware-Assisted Incremental Checkpointing in Speculative Parallel Discrete Event Simulation

Stefano

Ferracci

Santis

et al. 2019

2019 Winter Simulation Conference (WSC)

Self Cite

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“…Most of them [13,25,30,35,37] are based on taking checkpoints periodically, each χ event executions, so that the strategy itself is aimed at (adaptively) selecting the best suited value for the parameter χ, called checkpoint interval. Some more recent strategies [31,33] attempt to further optimize that tradeoff by relaxing the constraint that checkpoints should be taken on a periodic basis.…”

Section: Checkpointingmentioning

confidence: 99%

“…Actually, the algorithm presented in [13] for the adaptive selection of the checkpoint interval χ in a PSS strategy, and then re-used in [31] for the adaptive selection of a threshold value of the simulation time advancement in order to determine the positions of checkpoints on the basis of the event execution pattern in simulation time, can be re-used also to perform adaptive tuning of the parameter threshold j in the CCA semantic. That algorithm is based on the on-line observation of a checkpointing/recovery cost function for each LP j , namely F j = C ckpt j + C cf j , where C ckpt j and C cf j represent, respectively, the overheads due to checkpointing and coasting forward for LP j .…”

Section: Tuning the Value Of Thresholdmentioning

confidence: 99%

Nonblocking checkpointing for optimistic parallel simulation: description and an implementation

Quaglia

Santoro

2003

IEEE Trans. Parallel Distrib. Syst.

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This paper describes a non-blocking checkpointing mode in support of optimistic parallel discrete event simulation. This mode allows real concurrency in the execution of state saving and other simulation specific operations (e.g. event list update, event execution), with the aim at removing the cost of recording state information from the completion time of the parallel simulation application. We present an implementation of a C library supporting non-blocking checkpointing on a myrinet based cluster, which demonstrates the practical viability of this checkpointing mode on standard off-the-shelf hardware. By the results of an empirical study on classical parameterized synthetic benchmarks we show that, except for the case of minimal state granularity applications, non-blocking checkpointing allows improvement of the speed of the parallel execution, as compared to commonly adopted, optimized checkpointing methods based on the classical blocking mode. A performance study for the case of a Personal Communication System (PCS) simulation is additionally reported to point out the benefits from non-blocking checkpointing for a real world application.

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“…To support rollback, the state of the LP needs to be saved after each event is processed. In order to reduce the amount of memory used, the state can be saved less frequently [21,26,27]. The side effect of smaller checkpoint frequency is the increased cost of performing a rollback.…”

Section: Background and Related Workmentioning

confidence: 99%