Evaluation of strain induced by implantation in SOI materials

Abstract

We report on the effect of implantation damage and annealing in SOI material. For targeted doping level up to 6 × 10 18 cm -3 , we show that good recovery can be obtained with final electrical properties close to one of the bulk materials.1. Introduction Using X-ray diffraction, the effect of implantation and implantation damage annealing has been extensively studied in bulk silicon at high dose and high energy [1][2][3][4][5][6]. The goal was to improve the high doping level of source and drain contacts in MOS transistors. Due to aggressive implantation conditions, silicon was amorphized. The effect of laser and/or conventional annealing with temperature ranging from 200 to 650 °C had to be evaluated [2,3,6]. From the work of Cargill et al. [2,3], it was found that As atoms in heavily doped Si become electrically inactive by forming As 4 -vacancy complexes when the annealing temperature exceeds 500 °C. In order to achieve a good control of the junction depths in shallow junction MOS devices, low temperature annealing is preferred but every time a compromise has to be found to obtain nearly 100% activation and, at the same time, low level of implantation defects.Studying implantation at low dose and low energy is more difficult. The effects are weak and the implantation fingerprint on silicon rocking curves is hidden by the foot of the silicon peak (and/or noise). Contrary to bulk silicon, bonded SOI wafers allow to carry this work. The SOI bonding introduces a small misorientation between the silicon overlayer and the thick "handle" silicon wafer which nicely separates their rocking curves. In this work we investigate the effect of low dose and weak energy As implantation and annealing on the strain and damage present in SOI wafers.

Process-induced strain in silicon-on-insulator materials

“…This is still far from the values of the order of a GPa involved in some cases for defective devices [5,6], but shows that such catastrophic values can be easily achieved due to inappropriate device processing or design. In a recent work [23], we estimated the effect of As implantation on the stress in SOI wafers. We found that the introduction of interstitial As atoms in the silicon crystal induces a strong compressive stress in the SOL (−193 MPa for the highest dose) which also compresses the BOX (−920 MPa).…”

In-plane strain distribution in the surface region of thin silicon overlayers on insulator

“…7,15,16 To reproduce the experimental curves, we constructed a structural model for the SNOL on the insulator, assuming that the SNOL is composed of two layers ͑surface region and underlying layers͒ with two different strain levels. 7,15,16 To reproduce the experimental curves, we constructed a structural model for the SNOL on the insulator, assuming that the SNOL is composed of two layers ͑surface region and underlying layers͒ with two different strain levels.…”