Evaluation of robust EPE monitoring and control metric methodologies for advanced DRAM nodes yield improvement

Abramovitz, Yaniv; Yeo, Junho; Jee, Taekwon; Lee, Honggoo; Lee, Sang-Ho; Park, Chanha

doi:10.1117/12.2613931

Cited by 5 publications

(5 citation statements)

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“…In addition to the simple overlay measurement, from the given SEM imaging of the high resolution and seethrough nature, diverse metrics can also be measured including conventional CD and Overlay and user defined metrology -Shape, Distance, EPE, MBI (Metrology based Inspection), etc. This approach was named as All-In-One (AIO) measurement which delivers all types of metrology information in a single image [3,4] . For further analysis, various post arithmetic could be applied and being utilized for detecting the process signature of interest.…”

Section: Resultsmentioning

confidence: 99%

“…In this study, two application spaces have been expanded in addition to the previous study [3,4] . One is the see through imaging which has been extended to ADI step thanks to the improved landing anergy and current of advanced SEM column technology [6] .…”

Section: Resultsmentioning

confidence: 99%

“…Hence implementing EPE with the constructive way as in-line monitoring metric is not practical and straightforward way. This limitation on traditional EPE methodology can be overcome through single image-based approach [2,3] , where EPE is measured directly from the high landing energy see-through image [4] . Another advantage is that in parallel it provides CD, Overlay and local variability measured at once on a real device feature.…”

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confidence: 99%

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Interlayer 3D-EPE analysis using contour distance from design with high landing energy SEM imaging on advanced logic devices

Chung,

Maeng,

Kim

et al. 2024

Metrology, Inspection, and Process Control XXXVIII

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Edge Placement Error (EPE) is a construction metric which can be derived from CD (critical dimension), Overlay and LER (Line Edge Roughness) measurements from multiple layers [1] , and is well accepted as a critical metric of patterning control due to the increases of process complexity as the design rule shrinkage of CMOS devices. Historically, these conventional metrics are measured from multiple tools on different patterns and locations; for example -overlay, on an optical tool from scribe-line target at ADI (After Develop Inspection) step, while CD/LER data are measured using a CD-SEM tool on a real device pattern at ADI/ACI (After Clean Inspection) steps. TMU (Total Measurement Uncertainty) increasement, which causes the consistency of EPE analysis, is the major limiting factor with the constructive EPE approach. Hence implementing EPE with the constructive way as in-line monitoring metric is not practical and straightforward way. This limitation on traditional EPE methodology can be overcome through single image-based approach [2,3] , where EPE is measured directly from the high landing energy see-through image [4] . Another advantage is that in parallel it provides CD, Overlay and local variability measured at once on a real device feature. All-In-One (AIO) means all EPE related metrics (CD, Overlay, LER, EPE metric) are captured with single image, which is inherently delivering TMU of sub nm level. Continuous device scaling requires tighter TMU in patterning process integration and control.

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Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

mentioning

confidence: 99%

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Interlayer 3D-EPE analysis using contour distance from design with high landing energy SEM imaging on advanced logic devices

Chung,

Maeng,

Kim

et al. 2024

Metrology, Inspection, and Process Control XXXVIII

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“…As technology scaling toward the sub-10-5nm, driven by advanced patterning, the pattern control complexity increase [1] . The pattern becomes denser, characterized by complex polygons, requires more measurements to control electrical performance and reliability.…”

Section: Introduction 11 Backgroundmentioning

confidence: 99%

Direct yield prediction from SEM images

Choona

Linshiz

Pres

et al. 2023

Metrology, Inspection, and Process Control XXXVII

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In line Electrical measurement (E-Test) are the most effective predictors for EOL yield control. As technology progress with scaling, the number. of process layers increases, allowing in-line electrical measurements only after several months since lot started process in-line. As a result, each E-Test monitor controls longer and more challenging process loop. Most of the in-line pattern control that impact electrical performance measured separately for each pattern polygon and material properties. In addition, Edge Placement Error (EPE) methodology, allows combination of multiple dimensions like CD, Overlay and LER measurements to better predict yield impact. Technology shrinkage, resulting that transistor electrical performance, defined by more geomaterial parameters as well as material compositions and defectivity. In this paper we demonstrate a direct prediction from high resolution Scanning Electron Microscope (SEM) images to the first inline electrical measurement (M1) using Deep Learning (DL) techniques. The DL model provide early prediction of electrical performance, describing accurately Within Wafer (WIW) variation weeks earlier than the actual electrical measurements. Multiple layers prediction may indicate suspected process loop that modulate majority of variation and save time to solution. It can be achieved since the DL model utilizes complementary information exist on the full e-Beam image like materials and defectivity. The following results will indicate that accumulating information collected from several layers will improve prediction sensitivity and lead to even more accurate prediction capabilities. We assume that the effectiveness of the proposed prediction method will increase with process complexity, since the modulation of the existing yield predictors is losing sensitivity as design rule shrinks. In addition, since fabrication phase gets longer, the time to actual electrical measurements increase, making an early, nondestructive, and accurate prediction for electrical performance more and more valuable.

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“…

High voltage scanning electron microscopy (HV-SEM) has recently been adopted as an on-device overlay metrology tool [1,2,3]. However, the chip-manufacturing industry requests more advanced tools capable of low-distortion imaging and versatile measurement functionality for multi-layer processing.

…”

mentioning

confidence: 99%

Advanced high-voltage e-beam system combined with an enhanced D2DB for on-device overlay measurement

Kang¹,

Maruyama²,

Yamazaki³

et al. 2023

Metrology, Inspection, and Process Control XXXVII

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High voltage scanning electron microscopy (HV-SEM) has recently been adopted as an on-device overlay metrology tool. However, the chip-manufacturing industry requests more advanced tools capable of low-distortion imaging and versatile measurement functionality for multi-layer processing. We developed a high voltage e-beam inspection (HV-EBI) tool for on-device overlay metrology that fills the abovementioned requirement. The HV-EBI tool has the capability of variable acceleration voltage in the range of 30kV to 50kV and wide field of view (FOV) imaging up to a maximum of 50μm with extremely low first-order distortion in the level of <0.01% and 0.1mrad and uniform in-plane beam perpendicularity. In this paper, we demonstrate the performance of on-device overlay measurement by using the proposed HV-EBI tool combined with enhanced die-to-database (D2DB) algorithm and image processor.

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Evaluation of robust EPE monitoring and control metric methodologies for advanced DRAM nodes yield improvement

Cited by 5 publications

References 0 publications

Interlayer 3D-EPE analysis using contour distance from design with high landing energy SEM imaging on advanced logic devices

Interlayer 3D-EPE analysis using contour distance from design with high landing energy SEM imaging on advanced logic devices

Direct yield prediction from SEM images

Advanced high-voltage e-beam system combined with an enhanced D2DB for on-device overlay measurement

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