Evaluation Of Ni(Si_1-xGe_x) and Pt(Si_1-xGe_x) Contact Resistance for FD-SOI PMOS Metallic Source and Drain

Abstract

To improve 20nm FD-SOI pMOS transistor performances, salicide process must be optimized on SiGe source&drain. In this paper, we propose an investigation on Ni and Pt/Si1-xGex (x=0.15, 0.3) systems. In a first part, process window is studied to determine thermal budget domain where the less resistive phase is stable morphologically and thermically. Solid state reactions in terms of phase sequence, thermal stability and morphology have been examined. At high temperature, two kinds of degradations have been observed. In Ni case, Ge out diffusion leads to the film agglomeration. In Pt case, grain coalescence degrades germanosilicide film. In a second part, contact resistivity has been extracted on lateral germanosilicides thanks to new designed structures. After a validation on Pt/Si system, RC extraction has been carried out on Si1-xGex substrate up to 30% of Ge. RC seems to be better with Pt compared to Ni with the same conditions of process optimizations.

Source and Drain Contact Module for FDSOI MOSFETs : Silicidation and Strain Engineering

“…The composition, the strain as well as the crystalline quality of epitaxial layers before and after silicidation is analyzed through high resolution x-ray diffraction (HR-XRD) and transmission electron microscopy (TEM). Many papers deal with silicide formation on SiGe layers with a Ge content up to 30% (13)(14)(15)(17)(18)(19)(20) but much less deal with higher Ge concentrations. Since for a fixed SiGe thickness, strain increases with Ge content, the relaxation risk is then emphasized at higher Ge concentrations.…”

Source & Drain Contact Module for FDSOI Mosfets : Silicidation and Strain Engineering

“…This point needs to be addressed especially when the metal reactive diffusion is performed on SiGe. Indeed, Ni germanosilicide films suffer from morphological degradation caused by Ge segregation -induced agglomeration [10,11]. To overcome this issue, NiPt alloys with few percents of Pt have been successfully introduced in Si and SiGe devices [12].…”

“…Finally, we will propose some orientations to achieve a robust source & drain contact module compatible with sub-28nm FDSOI technology nodes. (g), (h), and (i) correspond to the specimen after a 450 °C anneal [11]…”