Evaluation of multi-level buck converters for low-power applications

Abdulslam, Abdullah; Amer, Sherif; Emara, Ahmed S.; Ismail, Yehea

doi:10.1109/iscas.2016.7527360

Cited by 10 publications

(4 citation statements)

References 5 publications

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“…In the preliminary structure of hybrid DC-DC converter, the inductor is required to soft charge the flying capacitor to reduce the charge sharing loss. However, on-chip inductor integration has increased the complexity of the circuit [33].…”

Section: A Power Losses Analysismentioning

confidence: 99%

Design and Implementation of Hybrid DC-DC Converter: A Review

et al. 2023

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The advancement in Power Management Integrated Circuit (PMIC) has driven the DC-DC conversion technology into a System-on-Chip (SoC) solutions, leveraging CMOS technology scaling from 180nm to 22nm and on-chip passive element integration. Concurrently, as the applications demand smaller form factor solution towards device portability with optimized power qualities, switched-capacitor-inductor hybrid architectures with fully-integrated passives have become a popular choice for a compact and high efficiency converter solution, in contrast to bulky and discrete component based alternatives. This article reviews the latest advancements in hybrid dc-dc topologies, specifically for low-power applications to address the downsides such as charge sharing loss, high current ripple, limited conversion ratio, low power density and efficiency. An overview of capacitor and inductor technology is discussed in terms of on-chip parasitic losses, and miniaturization. A comprehensive comparison in the state-of-the-art hybrid dc-dc converter work is tabulated with power density and efficiency as the primary performance metrics, highlighting their operability in low-power applications. Moreover, a discussion is included with quantified benchmarks to justify the viability of converters, along with the future recommendation of realizing ultra-high switching frequency for smaller footprint inductor and design approach to resolve the current tradeoff bottlenecks.

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Section: A Power Losses Analysismentioning

confidence: 99%

Design and Implementation of Hybrid DC-DC Converter: A Review

et al. 2023

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“…Another study was made by (A. Abdulslam, 2016) shows that multileveled converters are more advantageous when compared to the typical single-level buck converter. The study was made by simulating a single-level, three-level, and five-level buck converter using SPICE, utilizing the same value for each level to maximize performance.…”

Section: Literature Reviewmentioning

confidence: 99%

“…The study was made by simulating a single-level, three-level, and five-level buck converter using SPICE, utilizing the same value for each level to maximize performance. The simulation showed that the five-level converter had the highest efficiency, but their research showed that the three-level converter outperformed the five-level due to switching losses [6].…”

Section: Literature Reviewmentioning

confidence: 99%

“…(4) (5) The switching frequency of the buck converter was set to 20 kHz, with this, by using ( 4) and ( 5), the inductor obtained is 331.02 µH and the capacitor obtained is 25.582 µF, both values were adjusted to 330 µH and 26 µF respectively. (6) And lastly, the resistance load of the buck converter can be found using (6), since the estimated output current is 3 A and output voltage is 11 V, the resistance load obtained is 3.67 Ω. Meanwhile, the inductance and capacitance load for the RLC load buck converter experiment, were utilizing the same value as the inductor and capacitor of the buck converter.…”

Section: Eb Chow Et Al / Analysis Of Load Current Ripple In a Five Le...mentioning

confidence: 99%

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Analysis of Load Current Ripple in a Five Level Buck Converter

Chow,

Khan,

Mokayef

2023

Advances in Transdisciplinary Engineering

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A buck converter, sometimes known as a step-down converter, is a kind of DC-to-DC converter that belongs to the DC chopper family. Buck converters are a sort of switching power electrical device that is typically used to provide an alternating DC output voltage that is less than the constant DC input voltage source. The primary focus in the field of electronic appliances is on the root cause of harmonic distortion in a Buck converter system, where interference from harmonic signals frequently appears at both the input and output terminals of the load side, affecting the efficiency and performance of the buck converter. This research paper focuses on the load current ripple content and the harmonic problem encountered by a five-level buck converter. The research consists of ten buck converters with varying levels and two different loads, R load and RLC load, and all of these converters were used to compare one to the other as one of the objectives of this research. After repeated calculations, trial and error, and conclusion of the study hypothesis, the research got intriguing findings where the buck converter ripple and harmonic content were minimized by raising the buck converter level.

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