Evaluation of GBT-FPGA for timing and fast control in CBM experiment

Abstract

Timing and Fast Control (TFC) system for the Compressed Baryonic Matter (CBM) experiment is being developed with focus on low and deterministic data transmission latency. This helps to minimize data corruption in the free-streaming Data Acquisition (DAQ) system during occasional data bursts caused by the expected beam intensity fluctuations. Proven in latency-optimized experimental data transport applications, the GBT-FPGA core is expected to positively contribute to the TFC system performance. In this work, the core has been integrated as the primary communication interface and its effect on transmission latency and quality of time distribution has been evaluated.

Time error accumulation in a hierarchical time and clock distribution network with deterministic optical links

“…As the core is an HDL implementation of the symmetric GBT protocol, it can also be used for communication between two FPGA devices [6]. Combined with a clocking scheme optimization, GBT-FPGA demonstrates sufficiently low and deterministic link latency [7]. This core is used to serve the links between TFC nodes, with the resulting architecture of the time distribution chain shown in figure 1.…”