2015 IEEE Energy Conversion Congress and Exposition (ECCE) 2015
DOI: 10.1109/ecce.2015.7309831
|View full text |Cite
|
Sign up to set email alerts
|

Evaluation of current limiting methods for grid forming inverters in medium voltage microgrids

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
4
1

Citation Types

1
36
0

Year Published

2017
2017
2024
2024

Publication Types

Select...
7
1

Relationship

0
8

Authors

Journals

citations
Cited by 58 publications
(37 citation statements)
references
References 12 publications
1
36
0
Order By: Relevance
“…After the real power, reactive power, and peak voltage are calculated a droop control is performed to using the equation 3.5, where m p is the droop power-frequency char- A virtual impedance current limiting scheme discussed in [17] was used to limit the currents at 2 pu. The virtual impedance method is an alternative to the current reference limitation used in the grid following inverter.…”
Section: Grid-forming Inverter Modelmentioning
confidence: 99%
“…After the real power, reactive power, and peak voltage are calculated a droop control is performed to using the equation 3.5, where m p is the droop power-frequency char- A virtual impedance current limiting scheme discussed in [17] was used to limit the currents at 2 pu. The virtual impedance method is an alternative to the current reference limitation used in the grid following inverter.…”
Section: Grid-forming Inverter Modelmentioning
confidence: 99%
“…However, this will cause wind-up in the outer power loops, which can lead to instability [17]. To circumvent this, several researchers propose the use of virtual resistors, either linear [23] or nonlinear [24] to reduce the converter voltage reference. Also, the influence of a virtual impedance structure on the current limitation is analyzed in [25].…”
Section: Introductionmentioning
confidence: 99%
“…As disclosed, the current limitation is largely depending on the fault location and the selected virtual impedance, which may limit its usefulness in practice as the maximum converter current is desired to be utilized during any fault condition. To that end, the virtual impedance concept may cause problems in parallel operation [24]. In [26], both limitations of the inner current reference and voltage reference reduction using the virtual impedance concept are conducted.…”
Section: Introductionmentioning
confidence: 99%
“…For the FRT capability enhancement of a VSC controlled as a VSM, the researchers tend to build a VSM structure with an inner positive sequence Current Control (CC) loop [13][14][15][16][17][18][19][20][21][22][23], or positive and negative (pn) sequence controllers [18,24]. In addition to the use of the current loop, some ancillary controllers have been used to enhance the FRT performance such as virtual impedance [13,15,17,19,20,[25][26][27], current reference saturation [18,[28][29][30][31], and some structures merging both techniques [14,16]. However, some authors reported instabilities regarding the virtual impedance [28,29], and the current reference saturation [20,32].…”
Section: Introductionmentioning
confidence: 99%
“…In addition to the use of the current loop, some ancillary controllers have been used to enhance the FRT performance such as virtual impedance [13,15,17,19,20,[25][26][27], current reference saturation [18,[28][29][30][31], and some structures merging both techniques [14,16]. However, some authors reported instabilities regarding the virtual impedance [28,29], and the current reference saturation [20,32]. The authors in [33] reported that an inner CC loop within a VSM structure requires careful tuning to avoid instability, especially for low switching frequency.…”
Section: Introductionmentioning
confidence: 99%