Evaluation of Capacitor Ratios in Automated Accurate Common-Centroid Capacitor Arrays

Abstract

In this paper, design and measurement results of a test chip that intends to evaluate differences between layout techniques for rectangular unit-capacitor arrays are introduced. Precision capacitor ratios are compared using a switched-capacitor biquad and a pseudo-floating gate configuration. The test chip is used to evaluate the effectiveness of an automatic common-centroid capacitor array generation tool with arbitrary capacitor ratios. Results indicate significant improvements in ratio accuracy, which have a direct impact on a wide range of applications such as filters for wireless communications, hard drives, and high precision baseband processing.

Automatic placement of identical unit capacitors to improve capacitance matching

“…This characteristic helps the optimization algorithm to converge, because the placement with common centroid can easily satisfy the constraint (14). Thus, our problem consists in minimizing the cost function (15) subjected to the constraint (14). To solve this problem we have used a constrained simulated annealing algorithm [23], in which the actual cost function is given by:…”

Surface versus Performance Trade-offs: A Review of Layout Techniques

“…In [16], McNutt, LeMarquis, and Dunkley have identified five sources of systematic capacitance mismatch and developed a list of layout rules leading to accuracy as good as 0.1% on capacitance ratio. Based on these rules, Khalil et al have developed for lab use an automatic tool to generate capacitor array to optimize capacitance ratio and evaluated the efficiency of this tool through a measurement of fifty test chip [17]. In [18] and [19], Soares, Mesquita, and Petraglia have proposed a genetic algorithm to obtain the best approximation for capacitance ratio for implementing nonrational filter coefficients with a reasonable number of unit cells.…”

Optimal common-centroid-based unit capacitor placements for yield enhancement of switched-capacitor circuits

“…. :C N , the ratio of multiple capacitors, several evaluation functions have been recently proposed [McNutt et al 1994;Khalil et al 2005;Khalil and Dessouky 2002;Ma et al 2007]; an effective capacitor placement methodology based on spatial correlation has been proposed [Chen et al 2010] and implemented to the design of SAR ADCs [Lin et al 2011]. More specifically, let ρ ij be the correlation coefficient of a pair of capacitors, C i and C j .…”

“…The key performance of many analog integrated circuits, such as analog-to-digital converters (ADCs) and sample and hold, is directly related to accurate capacitance ratios [McNutt et al 1994]. The capacitance ratio mismatch problem can be alleviated by using parallel unit capacitances [Khalil et al 2005], and the precision of the unit capacitance array can be further improved by common centroid structures [Khalil et al 2005;Khalil and Dessouky 2002;Ma et al 2007;Hastings 2000]. These structures significantly reduce the effects of gradients and random errors in fabrication.…”

“…A number of layout rules were developed for guiding designers to develop an appropriate layout that meets these conditions [Khalil et al 2005;Khalil and Dessouky 2002;Ma et al 2007;Hastings 2000]. However, the layout shape must be rectangular to meet these four conditions.…”