Evaluating the performance of HPC-style SYCL applications

Abstract

SYCL is a parallel programming model for developing single-source programs for running on heterogeneous platforms. To this end, it allows for one code to be written which can run on a different architectures. For this study, we develop applications in SYCL which are representative of those often used in High-Performance Computing. Their performance is benchmarked on a variety of CPU and GPU architectures from multiple vendors, and compared to well optimised versions written in OpenCL and other parallel programming models. CCS CONCEPTS• General and reference → Performance; • Computing methodologies → Parallel programming languages; Massively parallel and high-performance simulations; • Software and its engineering → Parallel programming languages.

Under the Hood of SYCL – An Initial Performance Analysis with An Unstructured-Mesh CFD Application

“…The use of an unstructured mesh application, which is characterized by their indirect memory accesses leads to an interesting benchmarking study as such an irregular motif is difficult to parallelize. This we believe will provide a more contrasting evaluation of SYCL, complementing previous work [9] on regular parallel motifs such as structured-mesh applications. Furthermore, the use of OP2's source-to-source translator to automatically produce SYCL parallelizations enabled us to rapidly explore the design space and various optimizations without needing to manually modify MG-CFD's 25 loops.…”

The Rodinia Benchmarks in SYCL

“…Hence, the OpenCL implementations of the benchmark suite were ported to SYCL manually. The SYCL benchmark suite is an open-source project 1 for tracking the development of the mainstream SYCL compilers [13,14,15], and for developers and researchers interested in programming productivity, performance analysis, and portability across different computing platforms [16,17,18,19,20,21,22,23,24,25,26,27].…”

FLASH 1.0: A Software Framework for Rapid Parallel Deployment and Enhancing Host Code Portability in Heterogeneous Computing

“…The existing solutions (e.g., SyCL variances, HIP, Legion, and others) for improving portability in HPC fall notably short in providing user-friendly and truly hardware-agnostic functionality to the overlaying application [28], [16], [20]. Existing solutions only provide complex, pseudo-hardware-agnostic interfaces and hardwarespecific primitives that are only compatible with general-purpose or Von Neumann architecture-based platforms.…”