Evaluating schedulers for multimedia processing on buffer-constrained SoC platforms

Maxiaguine, A.; Künzli, Simon; Thiele, Lothar; Chakraborty, Samarjit

doi:10.1109/mdt.2004.60

Cited by 10 publications

(9 citation statements)

References 8 publications

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“…With upper service curves, such bursts are flattened. Lower arrival curves, on the other hand, are similarly needed to tighten outgoing upper service curves of a component, and sometimes their existence is even essential, for example, to analyze real-time systems with play-out buffers, see [11]. As a consequence of the importance of upper service curves and lower arrival curves, the relations that define abstract component, as for example (7)- (10), are different from the ones known from Network Calculus.…”

Section: The Relation Between Network and Real-time Calculusmentioning

confidence: 99%

System architecture evaluation using modular performance analysis: a case study

Wandeler

Thiele

Verhoef

et al. 2006

Int J Softw Tools Technol Transfer

159

144

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Performance analysis plays an increasingly important role in the design of embedded real-time systems. Time-to-market pressure in this domain is high while the available implementation technology is often pushed to its limit to minimize cost. This requires analysis of performance as early as possible in the life cycle. Simulation-based techniques are often not sufficiently productive. We present an alternative, analytical, approach based on Real-Time Calculus. Modular performance analysis is presented through a case study in which several candidate architectures are evaluated for a distributed in-car radio navigation system. The analysis is efficient due to the high abstraction level of the This work has been carried out as part of the boderc project under the responsibility of the Embedded Systems Institute.

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Section: The Relation Between Network and Real-time Calculusmentioning

confidence: 99%

System architecture evaluation using modular performance analysis: a case study

Wandeler

Thiele

Verhoef

et al. 2006

Int J Softw Tools Technol Transfer

159

144

View full text Add to dashboard Cite

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“…Therefore, accurate buffer dimensioning in multimedia MPSoC platforms has attracted lot of research attention. All prior works in buffer sizing ( [4] and [7]) discounted the idea of frame losses in favor of maximum output quality. There have also been works on frame dropping policies ( [2] and [8]) to maximize output quality in the presence of scarce buffer resources.…”

Section: A Motivationmentioning

confidence: 99%

“…In the past, there has been lot of work in this area where several design factors have been taken into consideration while choosing the appropriate buffer size. All these works did not tolerate any loss as a result of buffer overflow and underflow ( [4] and [7]). Hence, none of these works considered the trade off between buffer and video quality by allowing some buffer overflows (i.e.…”

Section: Related Workmentioning

confidence: 99%

Video quality-driven buffer dimensioning in MPSoC platforms via prioritized frame drops

Gangadharan

Chakraborty

et al. 2011

2011 IEEE 29th International Conference on Computer Design (ICCD)

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Abstract-We study the impact of a novel prioritized frame dropping scheme in buffer-constrained multiprocessor systemon-chip (MPSoC) platforms. Accurate buffer dimensioning has attracted lot of research interest as large on-chip buffers result in increased silicon area and higher costs. Multimedia applications present the flexibility of trading off quality for buffer space without any noticeable deterioration in video quality. The frame dropping scheme is crucial here to drop frames appropriately such that the required buffer size is reduced and target quality requirement is satisfied. Towards this, we propose a simple prioritized frame dropping mechanism which reduces the required buffer space more than existing frame dropping policies. We also provide a fast iterative procedure to find the minimum buffer size for a video clip with O(log(N drop )) number of iterations, where N drop is the maximum number of frames that can be dropped for a video clip so that a prespecified quality in terms of peak signal to noise ratio (PSNR) value is satisfied.

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“…Although we must admit that there are algorithms used for the response time improvement both with local buffers and start time control, buffer support does come with additional cost and causes difficulties in the derivation of start time control for subtasks. To determine the buffer size required for each subtask being executed on a specific processing element would be a very challenging problem by itself (even though there are already a number of studier on buffer allocation problems in hardwaresoftware co-design, e.g., Maxiaguine et al 2004;Murthy and Bhattacharyya 2001;Oh and Ha 2003). The difficulty in the derivation of start time control comes from the following observations: (1) subtasks might share processing elements and have precedence constraints among them, and (2) a subtask has flexibility to control its start time, and the start time control of any subtask could have an impact on that of other subtasks.…”

Section: Remarks On Buffer Support For Processing Elementsmentioning

confidence: 99%

“…When there is more than one task, sharing one non-preemptive processing element, buffers are used to store input data from other processing elements. As pointed out in previous work (e.g., Maxiaguine et al 2004;Oh and Ha 2003), such an approach may dramatically increase the chip size and power consumption. In particular, Maxiaguine et al (2004), Oh and Ha (2003) proposed static task scheduling with FIFO buffering in an image processing application.…”

Section: Introductionmentioning

confidence: 95%

Processing element allocation and dynamic scheduling codesign for multi-function SoCs

2010

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This work is motivated by the rapid increase in design complexity of many multi-function System on Chips. It proposes solutions to both resolve the hardware contention issues of non-preemptive processing elements shared among tasks, and to optimize cost. A software solution based on start time management is proposed to interleave task execution on processing elements. Algorithms are proposed to determine the required processing elements of selected types, when there is no knowledge on the release time of any task. For tasks whose release orders are known a priori, an optimal algorithm is presented if processing elements have the same cost, otherwise, if processing elements do not have the same cost, a pseudo polynomial-time algorithm based on dynamic programming is presented. The performance of the algorithms is also evaluated for general cases.

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Evaluating schedulers for multimedia processing on buffer-constrained SoC platforms

Cited by 10 publications

References 8 publications

System architecture evaluation using modular performance analysis: a case study

System architecture evaluation using modular performance analysis: a case study

Video quality-driven buffer dimensioning in MPSoC platforms via prioritized frame drops

Processing element allocation and dynamic scheduling codesign for multi-function SoCs

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