2007
DOI: 10.1007/s10852-007-9064-7
|View full text |Cite
|
Sign up to set email alerts
|

Evaluating Parallel Simulated Evolution Strategies for VLSI Cell Placement

Abstract: Abstract

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Year Published

2007
2007
2021
2021

Publication Types

Select...
3
2

Relationship

2
3

Authors

Journals

citations
Cited by 6 publications
(1 citation statement)
references
References 11 publications
(1 reference statement)
0
1
0
Order By: Relevance
“…SimE has been applied to a variety of optimization problems such as very large scale integration (VLSI) [2], [3], [4], [5], field programmable gate array (FPGA) design [6], signal processing [7], the driver scheduling problem [8], the set covering problem [9], operand data type problem [10], task matching and scheduling [11], routing in computer networks [12], and LAN topology design [13], [14]. However, no recent attempt has been made to investigate the effect of the evaluation step on the quality of the solution, and what should be the structure or characteristics of the evaluation function.…”
Section: Discussionmentioning
confidence: 99%
“…SimE has been applied to a variety of optimization problems such as very large scale integration (VLSI) [2], [3], [4], [5], field programmable gate array (FPGA) design [6], signal processing [7], the driver scheduling problem [8], the set covering problem [9], operand data type problem [10], task matching and scheduling [11], routing in computer networks [12], and LAN topology design [13], [14]. However, no recent attempt has been made to investigate the effect of the evaluation step on the quality of the solution, and what should be the structure or characteristics of the evaluation function.…”
Section: Discussionmentioning
confidence: 99%