Etching methods for texturing industrial multi-crystalline silicon wafers: A comprehensive review

Sreejith, K.; Sharma, A. K.; Basu, Prabir K.; Kottantharayil, Anil

doi:10.1016/j.solmat.2021.111531

Cited by 33 publications

(21 citation statements)

References 167 publications

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“…Whilst this methodology is not as low cost as the maskless RIE due to the need for patterning, previous works have demonstrated the effectiveness of this method in the fabrication of black silicon with good surface quality. 71,72 Hence, it is worth mentioning that for the masked-RIE, the choice of both the mask and the patterning technique plays a major role in the pattern transfer process. This section will thus be split into two parts in order to discuss the influence of the masking steps on the final structure profile.…”

Section: Masked and Mask-less Reactive Ion Etching (Rie)mentioning

confidence: 99%

A review of cost-effective black silicon fabrication techniques and applications

et al. 2023

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Section: Masked and Mask-less Reactive Ion Etching (Rie)mentioning

confidence: 99%

A review of cost-effective black silicon fabrication techniques and applications

et al. 2023

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“…In addition, plasma-induced surface damage is unavoidable, especially since some surface defects inherent to the Bosch process (e.g., scalloped sidewalls), e.g., the scalloped depth of microscale width etched trenches, are typically up to 100 nm, which can severely degrade device performance [ 19 ]. On the other hand, the aspect ratio of etched trenches by anisotropic wet chemical etching methods (such as the KOH-based etching) is limited by the etching rate differences between different crystallographic orientations [ 20 , 21 ]. Although the accurate alignment of the lithographically defined mask to the crystalline plane is achieved, the aspect ratio is still limited at 80:1 [ 22 ].…”

Section: Introductionmentioning

confidence: 99%

Wafer-Scale Fabrication of Ultra-High Aspect Ratio, Microscale Silicon Structures with Smooth Sidewalls Using Metal Assisted Chemical Etching

et al. 2023

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Silicon structures with ultra-high aspect ratios have great potential applications in the fields of optoelectronics and biomedicine. However, the slope and increased roughness of the sidewalls inevitably introduced during the use of conventional etching processes (e.g., Bosch and DRIE) remain an obstacle to their application. In this paper, 4-inch wafer-scale, ultra-high aspect ratio (>140:1) microscale silicon structures with smooth sidewalls are successfully prepared using metal-assisted chemical etching (MacEtch). Here, we clarify the impact of the size from the metal catalytic structure on the sidewall roughness. By optimizing the etchant ratio to accelerate the etch rate of the metal-catalyzed structure and employing thermal oxidation, the sidewall roughness can be significantly reduced (average root mean square (RMS) from 42.3 nm to 15.8 nm). Simulations show that a maximum exciton production rate (Gmax) of 1.21 × 1026 and a maximum theoretical short-circuit current density (Jsc) of 39.78 mA/cm2 can be obtained for the micropillar array with smooth sidewalls, which have potential applications in high-performance microscale photovoltaic devices.

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“…[3] The acid texturing of DWS multicrystalline silicon (mc-Si) wafers is particularly challenging due to nonuniform saw damages. [2] Furthermore, the presence of an a-Si layer on the surface interferes with acid etch kinetics. [4] As a result, the acid texturing process on the DWS mc-Si wafers produces a nonuniform texture, resulting in an optical loss.…”

Section: Introductionmentioning

confidence: 99%

“…[4] As a result, the acid texturing process on the DWS mc-Si wafers produces a nonuniform texture, resulting in an optical loss. [2] To address these limitations, several alternative texturing methods for the mc-Si wafers have been investigated. Currently, two main methods are used in production: dry and wet texturing.…”

Section: Introductionmentioning

confidence: 99%

“…[14] Thus, the cost advantage of using DWS wafers has not been completely achieved. [2] Wet etching in hot and alkaline solutions, which results in the formation of micro-pyramid structures on the wafer surface, is the most commonly used texturing technique. It is very efficient in reducing the reflectance of (100)-oriented monocrystalline Si (mono-Si) wafers.…”

Section: Introductionmentioning

confidence: 99%

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A Grain Orientation‐Independent Single‐Step Saw Damage Gettering/Wet texturing Process for Efficient Silicon Solar Cells

Jung

Min

Post

et al. 2023

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Improving electrical and optical properties is important in manufacturing high‐efficiency solar cells. Previous studies focused on individual gettering and texturing methods to improve solar cell material quality and reduce reflection loss, respectively. This study presents a novel method called saw damage gettering with texturing that effectively combines both methods for multicrystalline silicon (mc‐Si) wafers manufactured using the diamond wire sawing (DWS) method. Although mc‐Si is not the Si material currently used in photovoltaic products, the applicability of this method using the mc‐Si wafers as it contains all grain orientations is demonstrated. It utilizes saw damage sites on the wafer surfaces for gettering metal impurities during annealing. Additionally, it can crystallize amorphous silicon on wafer surfaces generated during the sawing process to allow conventional acid‐based wet texturing. This texturing method and annealing for 10 min allow for the removal of metal impurities and effectively forms a textured DWS Si wafer. The results show that the open‐circuit voltage (ΔVoc = +29 mV), short‐circuit current density (ΔJsc = +2.5 mA cm−2), and efficiency (Δη = +2.1%) improved in the p‐type passivated emitter and rear cells (p‐PERC) manufactured using this novel method, as compared to those in the reference solar cells.

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Etching methods for texturing industrial multi-crystalline silicon wafers: A comprehensive review

Cited by 33 publications

References 167 publications

A review of cost-effective black silicon fabrication techniques and applications

A review of cost-effective black silicon fabrication techniques and applications

Wafer-Scale Fabrication of Ultra-High Aspect Ratio, Microscale Silicon Structures with Smooth Sidewalls Using Metal Assisted Chemical Etching

A Grain Orientation‐Independent Single‐Step Saw Damage Gettering/Wet texturing Process for Efficient Silicon Solar Cells

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