2021
DOI: 10.35848/1347-4065/abd538
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Etching-induced damage in heavily Mg-doped p-type GaN and its suppression by low-bias-power inductively coupled plasma-reactive ion etching

Abstract: Inductively coupled plasma–reactive ion etching (ICP–RIE)-induced damage in heavily Mg-doped p-type GaN ([Mg] = 2 × 1019 cm−3) was investigated by low-temperature photoluminescence (PL) and depth-resolved cathodoluminescence (CL) spectroscopy. From PL measurements, we found broad yellow luminescence (YL) with a maximum at around 2.2–2.3 eV, whose origin was considered to be isolated nitrogen vacancies (V N), only in etched samples. The depth-resolved CL spectroscopy revealed that the etching-… Show more

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Cited by 17 publications
(6 citation statements)
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“…V-pits would form during the growth below the temperature around 850 °C through threading dislocations (TDs) for Mg-doped p-GaN layers [16] . FS-GaN substrates with low TDs were therefore used in this experiment to measure the electrical properties avoiding the V-pits formation.…”
Section: Experiments Methodsmentioning
confidence: 99%
“…V-pits would form during the growth below the temperature around 850 °C through threading dislocations (TDs) for Mg-doped p-GaN layers [16] . FS-GaN substrates with low TDs were therefore used in this experiment to measure the electrical properties avoiding the V-pits formation.…”
Section: Experiments Methodsmentioning
confidence: 99%
“…There are various forms of RIE, such as inductively coupled plasma reactive ion etching (ICP) RIE, deep reactive ion etching (DRIE), cryogenic DRIE, and Bosch DRIE. These RIE techniques are used to micro-fabricate silicon hollow micro-needles with smooth tapering [ 107 ], organic semiconductors with high-resolution displays [ 108 ], the optimization of high-aspect-ratio vertical Si nano-wire anodes for lithium-ion batteries [ 109 ], and the high fidelity and low roughness of SiC substrates for bulk acoustic wave resonators [ 110 ], investigate etching induced damage in p-type GaN at low temperatures [ 111 ] and the isotropic silicon etching of MEMS [ 112 ]. The process has some drawbacks, however, including being expensive because of the use of complex equipment, controlled conditions, and sidewall defects.…”
Section: Alternative Micro-feature Fabrication Processesmentioning
confidence: 99%
“…In addition, an anode electrode with low contact resistance is difficult to form with the player surface exposed by etching. 24,25) A method of forming a tunnel junction between each LED based on the aforementioned structure has been proposed. [26][27][28][29] Because the tunnel junction enables the anode/cathode electrodes to be shared between each LED, the ratio of the electrode area on the wafer can be reduced.…”
Section: Introductionmentioning
confidence: 99%