“…Post implementation core power results are given in Table 9 for a supply voltage of 1.2 V. The FB architecture consumes a total power of 0.37 mW. The FB algorithm was combined with a single channel DRC [25] and tested with a sample audio file for flatband condition and without any compression applied. The input and reconstructed output waveforms are shown in Fig.…”
Section: Simulation Results and Discussionmentioning
“…Post implementation core power results are given in Table 9 for a supply voltage of 1.2 V. The FB architecture consumes a total power of 0.37 mW. The FB algorithm was combined with a single channel DRC [25] and tested with a sample audio file for flatband condition and without any compression applied. The input and reconstructed output waveforms are shown in Fig.…”
Section: Simulation Results and Discussionmentioning
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