Equivalence Checking of System-Level and SPICE-Level Models of Linear Circuits

Abstract

Due to the increasing complexity of analog circuits and their integration into System-on-Chips (SoC), the analog design and verification industry would greatly benefit from an expansion of system-level methodologies using SystemC AMS. These can provide a speed increase of over 100,000× in comparison to SPICE-level simulations and allow interoperability with digital tools at the system-level. However, a key barrier to the expansion of system-level tools for analog circuits is the lack of confidence in system-level models implemented in SystemC AMS. Functional equivalence of single Laplace Transfer Function (LTF) system-level models to respective SPICE-level models was successfully demonstrated recently. However, this is clearly not sufficient, as the complex systems comprise multiple LTF modules. In this article, we go beyond single LTF models, i.e., we develop a novel graph-based methodology to formally check equivalence between complex system-level and SPICE-level representations of Single-Input Single-Output (SISO) linear analog circuits, such as High-Pass Filters (HPF). To achieve this, first, we introduce a canonical representation in the form of a Signal-Flow Graph (SFG), which is used to functionally map the two representations from separate modeling levels. This canonical representation consists of the input and output nodes and a single edge between them with an LTF as its weight. Second, we create an SFG representation with linear graph modeling for SPICE-level models, whereas for system-level models we extract an SFG from the behavioral description. We then transform the SFG representations into the canonical representation by utilizing three graph manipulation techniques, namely node removal, parallel edge unification, and reflexive edge elimination. This allows us to establish functional equivalence between complex system-level models and SPICE-level models. We demonstrate the applicability of the proposed methodology by successfully applying it to complex circuits.

Mathematical Root Simplification in Operational Amplifiers using an Ensemble Heuristic-Metaheuristic Algorithm

“…A positive feature of these methods is that the simplification is no longer driven by magnitude and phase errors but by the pole/zero position, allowing an improved error control. For example, a modified Signal-Flow Graph (named MSFG) has been recently developed to represent the equivalences between the system and SPICE outcomes of static nonlinear OTAs [15]. In this method, the circuit is firstly converted into an MSFG, and then, the graph would be simplified in particular polynomials by minimizing the MSFGs.…”

“…Equation (15) shows that 𝑃(𝑠, 𝐱) can be simplified into a product of a first-order polynomial (i.e., first dominant pole) and a high-order polynomial corresponding to other high-frequency poles. In a more general case, assuming the first 𝑚 poles (1 < 𝑚 < 𝑛) to be successively dominant in pairs (i.e., 𝑝 1 dominates 𝑝 2 , 𝑝 2 dominates 𝑝 3 , and so on, 𝑝 𝑚−1 dominates 𝑝 𝑚 ), 𝑃(𝑠, 𝐱) can be approximated as follows:…”

“…As can be seen, 𝑇 𝐸𝑅𝑆 has been set to 10 %, and thus, the poles and zeroes with no more than 10 % displacement can be simplified via first-order polynomials, while the other poles and zeroes are expressed via second-order polynomials. To justify the proposed methodology, we compare it against a time-constant approach [13], an eigenvalue technique [15], and an evolutionary-based algorithm using a genetic algorithm [34]. The block diagram of a three-stage compensation OTA can be shown in Fig.…”

“…Although the existing symbolic pole/zero analysis methods [8][9][10][11][12][13][14][15][16][17][18][19][20][21] incorporate some types of approximations during the calculation of transfer function, they suffer from some Disclaimer/Publisher's Note: The statements, opinions, and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions, or products referred to in the content.…”

Polychrony as Chinampas

“…Nonlinear signal flow graphs are used to study circulatory regulation [4], to design automatization of nonlinear data converters [5], to compare system-level and spice-level static nonlinear circuits [6], to build models for DC-DC buck-boost converters [7], and to analyze the problem of inverting a system consisting of nonlinear and time-varying components [8]. The nonlinear condition of our signal flow graphs is an abstraction of neural spikes.…”