EPR-Based Bounded Model Checking at Word Level

EPR-based k-induction with Counterexample Guided Abstraction Refinement

“…The bounded model checking representation of the system in first-order logic (BMC1) [11] consists of the following formulas:…”

“…The first encoding of BMC into EPR was proposed in [9]. This bit-level encoding was extended to word level in [10,11]. Experimental results reported in these papers regarding EPR-based BMC versus SAT and SMT-based approaches showed the promising potential of EPR-based BMC on industrial hardware model checking and equivalence checking problem instances with memories, which were the driving industrial examples for developing the EPR-based word-level BMC.…”

“…Indeed, the EPR-based BMC in [11] works with a single copy of the transition relation, and the on-demand unrolling is "built-in" in the solving of the problem instances arising with the EPR encoding. For this reason, the BMC algorithm in [11] is called BMC1 (to indicate that unlike the regular SAT-based BMC, the circuit is not copied at each unrolling bound). In the case of bit-level verification, this approach is related in idea with QBF-based model checking, e.g., in [14,15].…”

“…In Section 2, we quickly recall the BMC1 algorithm form [11] and discuss its extension with property lemmas. In Section 3, we introduce a basic version of EPRbased k-induction, and discuss in Section 4 how to adapt the encoding to always remain within the EPR fragment.…”

Instantiations, Zippers and EPR Interpolation

“…EPR has interesting applications in shape [8] and hardware analysis [5]. EPR offers a degree of succinctness over propositional logic that can be a significant advantage.…”