Epitaxial GeSn/Ge Vertical Nanowires for p-Type Field-Effect Transistors with Enhanced Performance

Abstract

Harvesting the full potential of single crystal semiconductor nanowires (NWs) for advanced nanoscale field-effect transistors (FETs) requires a smart combination of charge control architecture and functional semiconductors. In this article, high performance vertical gate-all-2 around nanowire p-type pFETs are presented. The device concept is based on advanced Ge0.92Sn0.08/Ge group IV epitaxial heterostructures, employing quasi-one-dimensional semiconductor nanowires fabricated with a top-down approach. The advantage of using a heterostructure is the possibility of electronic band engineering with band offsets tunable by changing the semiconductor stoichiometry and elastic strain. The use of a Ge0.92Sn0.08 layer as the source in GeSn/Ge NW pFETs results in a small subthreshold slope of 72 mV/dec and a high ION/IOFF ratio of 3×10 6 . A ~32% drive current enhancement is obtained compared to vertical Ge homojunction NW control devices. More interestingly, the drain-induced-barrier lowering is much smaller with GeSn instead of Ge as the source. The general improvement of the transistor's key figures of merits originates from the valence band offset at the Ge0.92Sn0.08/Ge heterojunction, as well as from a smaller NiGeSn/GeSn contact resistivity.

Thermoelectric Efficiency of Epitaxial GeSn Alloys for Integrated Si-Based Applications: Assessing the Lattice Thermal Conductivity by Raman Thermometry

“…31 For poly-Si, values above 8 W/(m•K) are reported, 32 and a value of 5 W/(m•K) is obtained for SiGe superlattice by thickness and strain engineering. 33 In contrast to poly-Si, SiGe nanowires, or SiGe/Ge superlattices, the excellent electrical performance of GeSn 15 makes GeSn an attractive thermoelectric material, as discussed below.…”

“…Typically, the thermal conductivity can be reduced by using alloys; thus a solution for an efficient and Si-integrable TE material could make use of the alloying of another group IV semiconductor, α-tin (Sn), with Ge or SiGe. Recently, epitaxial GeSn alloys have led to major advances in photonics, e.g., GeSn laser, − and in nanoelectronics, e.g., GeSn-based nanowire transistors . These successes were enabled by the progress made in the GeSn epitaxy on Ge/Si substrates , in industry-grade deposition reactors.…”

“…Recently, epitaxial GeSn alloys have led to major advances in photonics, e.g., GeSn laser, 12−14 and in nanoelectronics, e.g., GeSn-based nanowire transistors. 15 These successes were enabled by the progress made in the GeSn epitaxy on Ge/Si substrates 16,17 as CMOS-integrable TE materials remains unknown. The few existing experimental reports deal with amorphous or polycrystalline films, 18,19 while, ideally, good thermoelectric materials should be crystalline, where phonon scattering occurs without disrupting the electrical conductivity.…”

CMOS-Compatible Bias-Tunable Dual-Band Detector Based on GeSn/Ge/Si Coupled Photodiodes

“…14,15 The combination of Si, Ge, and Sn strongly widens the spectral range of operation, offering advanced architecture engineering and leveraging on the power of mature Si epitaxy and technology. 16,17 In this article we present a dual-band GeSn/Ge/Si sensor obtained by the vertical integration of two p-i-n photodiodes. The back-to-back photodiode architecture was originally proposed for simple simultaneous demultiplexing/detection of two wavelengths.…”

“…Solutions compatible with Si-based technology are, therefore, highly desirable. In this framework, new light sources − and detection devices based on group IV germanium–tin (GeSn) semiconductors have emerged as solutions for NIR-SWIR applications. , The combination of Si, Ge, and Sn strongly widens the spectral range of operation, offering advanced architecture engineering and leveraging on the power of mature Si epitaxy and technology. , …”