Epitaxial and Non-Epitaxial Heterogeneous Integration Technologies at NGST

Abstract

To meet increasingly challenging and complex systems requirements, it is not enough to use one single semiconductor technology but to integrate several high performance technologies in an efficient and cost effective way. Heterogeneous integration (HI) approaches lead to a significant higher design flexibility and performance. In this paper we present some of the HI approaches that are being used and developed at Northrop Grumman Space Technology (NGST) that include selective epitaxial growth, metamorphic growth and wafer level packaging (WLP) technology. More recently we are developing a scaled and selective wafer packaging technique to integrate III-V semiconductors with silicon under the COSMOS DARPA program.

3D Wafer-Scale Integration for RF and Digital Applications

“…NGST's unique Advanced Heterogeneous Integration (AHI) method merges novel chiplet selection/placement concepts with our proven wafer level packaging bonding techniques [1,2,3]. The process is designed to be flexible, featuring the capability of integrating multiple CS technologies and a wide range of CS chiplet sizes with any Si CMOS host wafer.…”