Entering the petaflop era: The architecture and performance of Roadrunner

Barker,; Davis, Kei; Hoisie,; Kerbyson,; Lang, Michael; Pakin, Scott; Sancho, José Carlos

doi:10.1109/sc.2008.5217926

Cited by 155 publications

(130 citation statements)

References 13 publications

Supporting

Mentioning

123

Contrasting

Unclassified

Order By: Relevance

“…With a peak performance of 205 (102) single-precision (double-precision) GFlops the PowerXCell 8i was the most powerful commercially available processor at the start of the QPACE project. The same processor is also used in the Roadrunner supercomputer [4], which at the time of writing this paper is still number one on the Top500 list [5].…”

Section: Powerxcell 8i Processormentioning

confidence: 99%

QPACE -- a QCD parallel computer based on cell processors

Pleiter¹,

Maurer²

2010

Proceedings of the XXVII International Symposium on Lattice Field Theory — PoS(LAT2009)

View full text Add to dashboard Cite

QPACE is a novel parallel computer which has been developed to be primarily used for lattice QCD simulations. The compute power is provided by the IBM PowerXCell 8i processor, an enhanced version of the Cell processor that is used in the Playstation 3. The QPACE nodes are interconnected by a custom, application optimized 3-dimensional torus network implemented on an FPGA. To achieve the very high packaging density of 26 TFlops per rack a new water cooling concept has been developed and successfully realized. In this paper we give an overview of the architecture and highlight some important technical details of the system. Furthermore, we provide initial performance results and report on the installation of 8 QPACE racks providing an aggregate peak performance of 200 TFlops.

show abstract

Section: Powerxcell 8i Processormentioning

confidence: 99%

QPACE -- a QCD parallel computer based on cell processors

Pleiter¹,

Maurer²

2010

Proceedings of the XXVII International Symposium on Lattice Field Theory — PoS(LAT2009)

View full text Add to dashboard Cite

show abstract

“…The IBM Cell processor is another example of general purpose heterogeneous chip-multiprocessors that have been used as the building blocks in supercomputers [158]. A Cell processor combines nine independent cores based on two different instruction sets and memory subsystems on a single die, including a main two-way hardware multithreading Power Processor Element (PPE) and eight coprocessors called Synergistic Processing Elements (SPEs) [159].…”

Section: Hardware Accelerationmentioning

confidence: 99%

Synchronization methods in parallel and distributed discrete-event simulation

Jafer

Liu

Wainer

2013

Simulation Modelling Practice and Theory

View full text Add to dashboard Cite

a b s t r a c tThis work attempts to provide insight into the problem of executing discrete event simulation in a distributed fashion. The article serves as the state of the art in Parallel DiscreteEvent Simulation (PDES) by surveying existing algorithms and analyzing the merits and drawbacks of various techniques. We discuss the main characteristics of existing synchronization methods for parallel and distributed discrete event simulation. The two major categories of synchronization protocols, namely conservative and optimistic, are introduced and various approaches within each category are presented. We also present the latest efforts towards PDES on emerging platforms such as heterogeneous multicore processors, Web services, as well as Grid and Cloud environment.Ó 2012 Elsevier B.V. All rights reserved. Parallel discrete-event simulationWith the computing power and advanced software available today, modeling and simulation has become a cost-effective tool for detailed analysis of a broad array of natural and artificial systems. Parallel and distributed simulation is widely accepted as the technology of choice to speed up large-scale discrete-event simulation and to promote reusability and interoperability of simulation components. Parallel Discrete-Event Simulation (PDES) has received increasing interest as simulations become more time consuming and geographically distributed. A rich literature has already been developed in the last three decades, taking advantage of the increasing availability of highly parallel and distributed computing platforms. It has been several years since the last survey by Perumalla [5] and a refreshed review of the latest developments would be needed for us to ponder new research initiatives, especially on emerging platforms such as many-core processors, Internetscale simulation environments, and cloud-based virtualized infrastructures.In parallel and distributed simulations, the entire simulation task is divided into a set of smaller subtasks with each executed on a different processor or node. Hence, the simulation system is viewed as a collection of concurrent processes, each modeling a different part of the physical system and executing on a dedicated processor in a sequential fashion. These processes communicate with each other by exchanging time-stamped event messages. An event refers to an update to simulation system state at a specific simulation time instant. Throughout the simulation, events arrive at destination processes, and depending on the delivery ordering system of the simulation, they are processed differently. The two commonly used orderings are (1) receive-order and (2) timestamp-order. With the first type, events are delivered to the destination processes when they arrive at the destination. On the other hand, with the timestamp-order, events are delivered in non-decreasing order of their timestamp, requiring runtime checks and buffering to ensure such ordering.1569-190X/$ -see front matter Ó

show abstract

“…The techniques described by Petrini and provided by the HPCC benchmarking suite have been used to describe the network (and overall system) performance of many emerging supercomputer installations, including the Cray XT4 and Blue Gene/P at Oak Ridge National Laboratory [1], [2], the Blue Gene/L systems at Argonne and Lawrence Livermore National Laboratory [5], and the Roadrunner system at Los Alamos National Laboratory [3]. The HPCC benchmark is a prototypical example of a benchmarking suite that reports results as summary statistics.…”

Section: A Related Workmentioning

confidence: 99%

Diagnosing Anomalous Network Performance with Confidence

Settlemyer¹,

Hodson²,

Kuehn³

et al. 2011

View full text Add to dashboard Cite

Abstract-Variability in network performance is a major obstacle in effectively analyzing the throughput of modern high performance computer systems. High performance interconnection networks offer excellent best-case network latencies; however, highly parallel applications running on parallel machines typically require consistently high levels of performance to adequately leverage the massive amounts of available computing power. Performance analysts have usually quantified network performance using traditional summary statistics that assume the observational data is sampled from a normal distribution. In our examinations of network performance, we have found this method of analysis often provides too little data to understand anomalous network performance. Our tool, Confidence, instead uses an empirically derived probability distribution to characterize network performance. In this paper we describe several instances where the Confidence toolkit allowed us to understand and diagnose network performance anomalies that we could not adequately explore with the simple summary statistics provided by traditional measurement tools. In particular, we examine a multi-modal performance scenario encountered with an Infiniband interconnection network and we explore the performance repeatability on the custom Cray SeaStar2 interconnection network after a set of software and driver updates.

show abstract

Entering the petaflop era: The architecture and performance of Roadrunner

Cited by 155 publications

References 13 publications

QPACE -- a QCD parallel computer based on cell processors

QPACE -- a QCD parallel computer based on cell processors

Synchronization methods in parallel and distributed discrete-event simulation

Diagnosing Anomalous Network Performance with Confidence

Contact Info

Product

Resources

About