Enhancing lithography printability through deep generative models for layout re-targeting

Abstract

As layout schemes become increasingly complex for advanced technology nodes, challenges such as large edge placement error (EPE) and poor OPC convergence in optical proximity correction (OPC) can lead to significant yield losses. To overcome these issues, widely adopted strategies include layout re-targeting before OPC and mask feature modification after OPC for mask synthesis. The former entails adjusting the after-development inspection critical dimension (ADI CD) target of the original design layout. However, this process often relies on a time-consuming trial-and-error iterative approach to determine optimal sizing values for specific layouts. In recent years, machine learning techniques have shown promise in computational lithography, offering efficiency improvements. Leveraging the advantages of machine learning for guidance on layout re-targeting has the potential to reduce turnaround time.This paper presents a methodology that incorporates deep generative models into the layout re-targeting flow to propose proper sizing values for the layout of 3D NAND channel holes. Initially, we train two different deep generative models, namely Generative Adversarial Networks (GANs) and the Diffusion Model. These models are employed to infer sizing values for pre-OPC patterns through model prediction, utilizing input error data. Subsequently, the inferred sizing values are input into the design rule check (DRC) commands for polygon movement. Experimental results demonstrate that both deep generative models can predict layout sizing in the re-targeting flow, resulting in significantly improved accuracy of ADI CD and reduced turnaround time compared to the traditional trial-and-error approach.